Business – Trang 2

Hệ sinh thái phần mềm ô tô VinFast: Báo cáo nghiên cứu

2. Global Software Supplier & Tier-1 Ecosystem Matrix

VinFast relies on a tier-1 supplier network for silicon, real-time operating systems (RTOS), ADAS perception, and cloud connectivity.

Category	Partner / Supplier	Platform / Software Product	Functional Role & Application
Compute & Silicon	NVIDIA	DRIVE AGX Thor / Hyperion 10	Central SDV computing platform, L4 Robotaxi architecture in SE Asia.
	Qualcomm	Snapdragon Digital Chassis (SA8155P / SA8295P)	Smart Cockpit, IVI processing, telematics, and multi-display control.
	Mobileye	EyeQ4 / EyeQ5	Vision perception SoC used in initial batches of VF 8 and VF 9 ADAS.
ADAS & AI Software	Autobrains	Agentic AI Software	L2++ camera-only driving assistance, perception logic without HD maps/LiDAR.
	ZF Group	CoPILOT / L2+ ADAS Systems	Integrated radar/camera suite, Highway Driving Chauffeur & Automated Parking.
	Bosch	ESP / eAxle Software	Electronic Stability Control (ESC), regenerative braking, powertrain domain control.
OS & Middleware	BlackBerry QNX	QNX Neutrino RTOS / OS for Safety	ISO 26262 ASIL-D certified safety microkernel foundation for gateway & ADAS ECUs.
	Elektrobit (EB)	EB corbos / EB tresos	AUTOSAR Adaptive & Classic middleware stacks layer on QNX/Linux.
	Vector Informatik	MICROSAR / CANoe	Diagnostic software stack, CAN/LIN bus communication protocols, ECU testing.
Infotainment & Maps	Google / Android	Android Automotive OS (AAOS)	OS foundation for main center-console infotainment head units.
	HERE Technologies	HERE Navigation SDK & ISA Map	Navigation, EV routing, and Intelligent Speed Assistance (ISA) for EU GSR compliance.
Cybersecurity & Cloud	VicOne (Trend Micro)	xZETA & Smart Parking Security	SBOM analysis, vulnerability discovery, in-vehicle threat detection.
	Amazon Web Services	AWS Automotive Cloud	Cloud infrastructure for vehicle telematics, OTA pipelines, big data storage.

3. VinAI Research Commercialization in VinFast Vehicles

VinAI (Vingroup’s artificial intelligence research hub led by Dr. Bui Hai Hung, former Google DeepMind scientist) has developed AI software suites directly deployed across VinFast’s EV lineup (VF e34, VF 5, VF 6, VF 7, VF 8, VF 9).

                              +--------------------------+

                              |    VinAI Mobility AI     |

                              +------------+-------------+

            +------------------------------+------------------------------+

            |                                                             |

+-----------v------------+                                    +-----------v------------+

|     InteriorSense      |                                    |      SurroundSense     |

+------------------------+                                    +------------------------+

| * Driver Monitoring    |                                    | * JellyView (360 3D)   |

| * MirrorSense (Gaze)   |                                    | * ASVM Parking         |

| * DrunkSense           |                                    | * Touch2Park           |

+------------------------+                                    +------------------------+

A. InteriorSense (In-Cabin AI Suite)

Driver & Occupant Monitoring System (DMS/OMS):
Uses infrared (IR) cameras and deep-learning vision models to track facial keypoints, eye blink rate, head pose, and drowsiness.
Detects phone usage, smoking, distraction, and posture anomalies.
Regulatory Compliance: Built to satisfy Euro NCAP 2024 and EU General Safety Regulation (GSR 2026) driver drowsiness and attention warning requirements.
MirrorSense (CES 2024 Innovation Award Winner):
World’s first AI-driven automatic mirror adjustment system.
Tracks the driver’s exact eye gaze position with sub-centimeter accuracy (10mm precision) using the internal DMS camera, automatically adjusting side-view and rear-view mirrors to match the optimal line of sight without manual adjustment.
DrunkSense:
Passive intoxication detection that evaluates eye movement patterns, pupil responsiveness, and driving behavior telematics (swerving, micro-corrections) to flag drunk driving risks without requiring a physical breathalyzer.

B. SurroundSense (Surrounding & Parking AI Suite)

JellyView (Transparent Vehicle / Under-Car View):
Synthesizes multi-camera video feeds around the car in real time to generate a 360-degree 3D transparent rendering of the vehicle.
Allows the driver to see "through" the chassis to monitor terrain, rocks, blind spots, and obstacles beneath the car during off-road or tight maneuvering.
Advanced Surround View Monitoring (ASVM):
Provides high-definition 360-degree bird’s-eye camera views with adaptive lighting compensation for night or rain driving.
AutoPark (Touch2Park & Valet Parking):
Computer-vision-based parking space recognition (detecting lines, curb structures, and obstacle boundaries). Enables one-touch autonomous parking slot selection and vehicle self-parking.

4. VinFast Software Architecture (SDV, OTA & Cybersecurity)

+-----------------------------------------------------------------------------------+

|                            CLOUD (AWS / VinCSS Portal)                            |

|             OTA Software Updates (UNECE R156) | Security Operations (CSMS)          |

+------------------------------------------+----------------------------------------+

                                           | (Cellular 5G / Telematics Gateway)

+------------------------------------------v----------------------------------------+

|                                CENTRAL DOMAIN COMPUTERS                           |

|  +-------------------------------------+    +----------------------------------+  |

|  |     Cockpit / Infotainment ECU      |    |        ADAS / Autonomous ECU     |  |

|  |  Android Automotive OS / Qualcomm   |    |   BlackBerry QNX / NVIDIA DRIVE  |  |

|  +-------------------------------------+    +----------------------------------+  |

+------------------------------------------+----------------------------------------+

                                           | (High-Speed Ethernet / CAN-FD)

+------------------------------------------v----------------------------------------+

|                             ZONAL GATEWAYS & CONTROLLERS                          |

|                  AUTOSAR Adaptive / Classic (Elektrobit / Vector)                 |

|  +------------------------+  +------------------------+  +---------------------+  |

|  | Front Zonal Controller |  | Rear Zonal Controller  |  | Chassis/Powertrain  |  |

|  +------------------------+  +------------------------+  +---------------------+  |

+-----------------------------------------------------------------------------------+

A. Centralized & Zonal Hardware/Software Platform

Architecture Transition: VinFast transitioned from distributed ECUs (30-50+ independent nodes) toward a Centralized Zonal Controller Architecture.
Domain Controllers:
Smart Cockpit Domain: Powered by Qualcomm Snapdragon (SA8155P/SA8295P) running Android Automotive OS for user features and QNX for digital cluster safety metrics.
ADAS / Vehicle Motion Domain: Powered by NVIDIA DRIVE / Qualcomm Snapdragon Ride / Mobileye chips, orchestrated by BlackBerry QNX Neutrino RTOS for real-time determinism.
Zonal Gateways: Zonal ECUs manage power distribution, body controls, and local sensor aggregations via CAN-FD and Automotive Ethernet (100BASE-T1 / 1000BASE-T1), utilizing AUTOSAR Adaptive for compute-heavy applications and AUTOSAR Classic for safety-critical microcontrollers.

B. Over-The-Air (OTA) Infrastructure

Dual-Layer OTA Architecture:
SOTA (Software-Over-The-Air): Updates IVI applications, maps, voice models (ViVi), and UI skins directly without vehicle immobilizing resets.
FOTA (Firmware-Over-The-Air): Updates low-level ECU firmware (BMS, MCU, ADAS logic) with fail-safe dual-bank flash memory (A/B partitioning) to ensure rollback capabilities in case of transmission failure.
UN R156 Compliance: Incorporates encrypted update packages signed via Vingroup PKI infrastructure and logs software version history to satisfy UNECE SUMS requirements.

C. Cybersecurity Framework

UNECE R155 & ISO/SAE 21434 Standard Compliance:
Established a formal Cybersecurity Management System (CSMS) covering the entire vehicle lifecycle from threat analysis and risk assessment (TARA) to decommissioning.
Multi-Layered Defense:
Hardware Root of Trust: Hardware Security Modules (HSM) embedded in vehicle controllers for secure boot and cryptographic key storage.
In-Vehicle Intrusion Detection: VicOne / VinCSS IDPS (Intrusion Detection and Prevention System) monitoring CAN bus anomalies and unauthorized memory access.
Cloud Security Operations Center (VSOC): Central security monitoring analyzing vehicle telemetry for real-time fleet threat intelligence.

5. Software Talent Acquisition & Organizational Restructuring

VinFast’s software engineering capability was built through internal consolidation, international hiring, and strategic R&D hubs.

                           +--------------------------------+

                           |  VinFast Software R&D Network  |

                           +---------------+----------------+

         +---------------------------------+---------------------------------+

         |                                 |                                 |

+--------v-------+                +--------v-------+                +--------v-------+

|  Internal Tech |                |  Global R&D    |                |  Executive &   |

| Consolidations |                |    Centers     |                | Engineering    |

| (VinSmart,     |                | (Hanoi, US,    |                |  Recruitment   |

| Vantix)        |                | Germany, Korea)|                | (Ex-OEM Talent)|

+----------------+                +----------------+                +----------------+

A. Internal Vingroup Consolidations & Talent Transfers

VinSmart Software Team Transfer (2021):
When Vingroup phased out its VinSmart smartphone manufacturing business in May 2021, over 1,000 mobile software developers, Android framework engineers, UI/UX designers, and IoT hardware experts were absorbed into VinFast.
This internal transfer accelerated VinFast’s in-house capabilities in Android Automotive OS customization, Bluetooth/Wi-Fi stack engineering, telematics, and cloud platform integrations.
Vantix Integration:
Vantix (Vingroup’s data analytics and AI wearable technology division) was integrated to strengthen VinFast’s telematics data engineering, factory automation software, and predictive maintenance algorithms.

B. R&D Center Footprint

Hanoi Software & Engineering Center (Headquarters): Serves as the main software engine, employing thousands of engineers focused on C/C++, Embedded Linux, QNX, AUTOSAR, and cloud backends.
Melbourne R&D Hub (Australia): In 2020, VinFast recruited former GM Holden automotive engineers and acquired the Lang Lang Proving Ground to lead vehicle platform development and chassis tuning (the Melbourne design office was subsequently consolidated back to Vietnam in 2021 while retaining key talent).
International Hubs: Strategic engineering presence in San Jose, California (USA) for ADAS and cloud partnerships, alongside satellite engineering offices in Germany and South Korea for supplier collaboration.

C. Executive & Engineering Talent Acquisition

VinFast actively recruited senior leadership from top global OEMs and Tier-1 suppliers:

Ex-GM Executives: Including Shaun Calvert (VP of Manufacturing), Roy Curran, and David Lyon (Director of Design) to build automotive-grade validation processes.
Ex-Tesla, Bosch, BMW Software Engineers: Hired across silicon integration, ADAS perception, BMS algorithms, and cybersecurity fields to bridge the gap between traditional automaking and agile tech practices.

6. Key Takeaways & Strategic Summary

Hybrid Ecosystem: VinFast combines domestic Vingroup synergies (VinAI for vision AI, VinCSS for cybersecurity, VinBigdata for NLP) with global Tier-1s (NVIDIA, Qualcomm, QNX, Elektrobit, ZF).
AI Differentiation: VinAI’s MirrorSense and JellyView serve as unique visual and UX selling points in competitive global markets.
SDV & Standards Readiness: VinFast’s architecture aligns with global regulatory standards (UNECE R155/R156, ISO 26262 ASIL-D, ISO/SAE 21434), enabling export compliance across the US and EU markets.

Topic 1: FPT Automotive MaaZ Stack & VinFast Integration

1.1 Stack Overview & Core Components

MaaZ (Monozukuri AUTOSAR) is FPT Automotive's proprietary, turnkey software stack designed to support full AUTOSAR compliance across the vehicle E/E development lifecycle. The stack is split into four distinct tiers:

MaaZ Classic Platform: Full Classic AUTOSAR stack for deeply embedded, safety-critical 32-bit Microcontroller Units (MCUs). Provides hardware-independent abstractions for real-time control.
MaaZ Adaptive Platform: High-performance software platform compliant with AUTOSAR Adaptive (ARA) for central domain controllers, High-Performance Compute (HPC) units, and automated driving servers running POSIX OSs (Linux/QNX).
MaaZ-Lite: Streamlined, memory-optimized Classic AUTOSAR stack specifically tailored for resource-constrained 16-bit and smaller 32-bit MCUs.
MaaZ PRO: Enhanced platform integrating AI-driven model creation, automated configuration, and test generation.

+-----------------------------------------------------------------------------------+

|                                 APPLICATION LAYER                                 |

|         Software Components (SWCs) / Adaptive Applications (ara::com / SWC)        |

+-----------------------------------------------------------------------------------+

|                         RTE / ARA (Runtime Environment)                           |

+--------------------------------------------------+--------------------------------+

|              CLASSIC AUTOSAR (BSW)               |        ADAPTIVE AUTOSAR        |

|  +--------------------+-----------------------+  |  +--------------------------+  |

|  |  Services (System, | Communication Stack   |  |  | ara::exec (Execution)    |  |

|  |  Memory, Diag)     | (CanIf, EthIf, SoAd)  |  |  | ara::com  (Communication)|  |

|  +--------------------+-----------------------+  |  | ara::diag (Diagnostics)  |  |

|  | MCAL (Microcontroller Abstraction)         |  |  | ara::per  (Persistency)  |  |

+--------------------------------------------------+--------------------------------+

|                 HARDWARE PLATFORM (AURIX TC3xx/TC4xx, S32K3, S32G)                |

+-----------------------------------------------------------------------------------+

1.2 Development Toolchain: MaaZ Studio

MaaZ Studio: An Eclipse-based Integrated Development Environment (IDE) and configuration generator supporting:
System & ECU configuration via standard ARXML schemas (AUTOSAR 4.x / Adaptive releases).
Automated BSW stack generation, validation, and build scripting.
ISO 26262 ASIL-D compliance support with qualified code generation.
Automotive SPICE (ASPICE) Level 2/3 software development workflow alignment.

1.3 Specific Contributions to VinFast & Target ECUs

FPT Automotive acts as a strategic software engineering partner for VinFast. Key contributions include:

Vehicle Control Unit (VCU): Developing Classic AUTOSAR BSW, MCAL, and RTE for EV torque management, regenerative braking, thermal routing, and charging state machines.
Body Control Module (BCM): Delivering MaaZ Classic/MaaZ-Lite stacks for central body control, lighting management, keyless entry, and door/window actuator orchestration.
Battery Management System (BMS): Implementing real-time AUTOSAR memory stack (NVM/Fee/Ea) for battery state-of-health (SOH) and state-of-charge (SOC) logging with high functional safety (ASIL-D).
Zonal Control Units (ZCUs): Integrating MaaZ Classic BSW for localized sensor reading, e-Fuse control, and CAN-FD to Ethernet bridging in VinFast's latest zonal platform.

1.4 Detailed AUTOSAR Layer Breakdown

Classic AUTOSAR Stack

BSW (Basic Software):
Communication Stack: `CanIf`, `CanTp`, `Com`, `PduR`, `EthIf`, `EthSM`, `TcpIp`, `SoAd` (Socket Adaptor for Ethernet), `LinIf`. Enables deterministic CAN-FD and SOME/IP messaging.
Memory Stack: `NvM` (Non-Volatile Memory Manager), `Fee` (Flash EEPROM Emulation), `Ea`, `MemIf`. Handles persistent diagnostic trouble codes (DTCs) and calibration parameter storage.
Diagnostic Stack: `DCM` (Diagnostic Communication Manager for ISO 14229 UDS), `DEM` (Diagnostic Event Manager), `FIM` (Function Inhibition Manager).
System Services: `EcuM` (ECU State Manager), `BswM` (BSW Mode Manager), `Det` (Development Error Tracer), `WdgM` (Watchdog Manager).
MCAL (Microcontroller Abstraction Layer):
Customized for silicon platforms used by VinFast (NXP S32K3/S32G, Infineon AURIX TC3xx, Renesas RH850).
Drivers: `Dio`, `Port`, `Adc`, `Pwm`, `Spi`, `Mcu`, `Wdg`, `Can`, `Eth`.
RTE (Runtime Environment):
Auto-generated by MaaZ Studio to map Software Components (SWCs) to hardware tasks.
Provides standardized APIs (`Rte_Read_<p>_<d>`, `Rte_Write_<p>_<d>`, `Rte_Call_<p>_<o>`) isolating application code from underlying hardware.

Adaptive AUTOSAR Services (ARA)

For domain computers and zonal central compute units:

`ara::com`: Service-oriented communication over Ethernet (SOME/IP and local IPC shared memory backend).
`ara::exec`: Execution Management managing application lifecycle via POSIX process scheduling and cgroups.
`ara::diag`: Diagnostic management over UDS / DoIP (Diagnostics over IP – ISO 13400).
`ara::per`: Persistency management for key-value stores and file storage.
`ara::sm`: State Management for vehicle operational modes.
`ara::iam`: Identity and Access Management protecting IPC/SOA calls against unauthorized software components.

Topic 2: VinAI Model Deployment on Snapdragon (SA8155P/SA8295P) & NXP S32G

2.1 VinAI Smart Mobility Product Suite

VinAI (a Vingroup company) develops advanced deep learning models for vehicle cabin and exterior perception:

InteriorSense:
Driver Monitoring System (DMS): Drowsiness, distraction, phone usage, smoking detection.
Occupant Monitoring System (OMS): Child Left Behind (CPD), seatbelt detection, passenger posture.
DrunkSense: AI-based intoxication detection analyzing micro-facial behaviors and eye movement patterns.
MirrorSense: World’s first AI automatic mirror adjustment technology (CES 2024 Innovation Award Honoree). Predicts 3D eye gaze and head posture to automatically adjust side-view mirrors with ~10mm precision.
SurroundSense:
Advanced Surround View Monitoring (ASVM): High-resolution 360-degree 3D bird's-eye view.
Jelly View / Transparent Bonnet: Real-time 3D synthesis rendering the ground underneath the chassis.
Touch2Park: Automatic parking spot selection and trajectory planning interface.

2.2 Model Optimization & Quantization Techniques

To achieve real-time latency (< 30ms per frame) on embedded automotive System-on-Chips (SoCs), VinAI applies rigorous quantization and hardware-specific model optimization workflows.

+-----------------------------------------------------------------------------------+

|                               MODEL TRAINING (PyTorch)                            |

|             FP32 Deep Learning Models (ResNet, MobileNet, YOLO-based)            |

+-----------------------------------------------------------------------------------+

+-----------------------------------------------------------------------------------+

|                            QUANTIZATION & OPTIMIZATION                            |

|  - Quantization-Aware Training (QAT) / Post-Training Quantization (PTQ)           |

|  - FP32 -> INT8 (Per-channel weight & per-tensor activation scaling)               |

|  - Operator Fusion (Conv + BatchNorm + ReLU)                                      |

+-----------------------------------------------------------------------------------+

+-----------------------------------------------------------------------------------+

|                              SDK HARDWARE COMPILATION                             |

|  +-------------------------------------+---------------------------------------+  |

|  | Qualcomm QNN / SNPE SDK             | NXP eIQ ML Software / ONNX Runtime    |  |

|  | (Compiles to Hexagon DLC Bytecode)  | (Targeting Arm Cortex-A / NXP S32G)   |  |

|  +-------------------------------------+---------------------------------------+  |

+-----------------------------------------------------------------------------------+

+-----------------------------------------------------------------------------------+

|                               TARGET HARDWARE EXECUTION                           |

|  +-------------------------------------+---------------------------------------+  |

|  | Qualcomm SA8155P / SA8295P          | NXP S32G2 / S32G3                     |  |

|  | Hexagon Tensor Processor (HTP/HVX)  | Cortex-A53 / Cortex-A72 cores         |  |

|  +-------------------------------------+---------------------------------------+  |

+-----------------------------------------------------------------------------------+

Quantization Strategy

Precision Conversion: Full Precision (FP32) $\rightarrow$ Signed INT8 for weights and activations.
Quantization Schemes:
Post-Training Quantization (PTQ): Used for heavy backbone layers where precision loss is negligible. Uses symmetric quantization for weights and asymmetric quantization for activations with KL-divergence calibration.
Quantization-Aware Training (QAT): Applied to fine-grained feature heads (e.g., MirrorSense 3D gaze vector calculation and facial keypoint detection) to maintain precision within a tight 10mm error boundary.
Per-Channel Weight Quantization: Prevents clipping errors caused by wide dynamic weight ranges across convolutional channels.

2.3 Hardware Acceleration & NPU/DSP Mapping

1. Qualcomm Snapdragon Cockpit Platforms (SA8155P / SA8295P)

Hardware Architecture:
SA8155P (3rd Gen): Kryo 485 CPU, Adreno 640 GPU, Hexagon 690 DSP (incorporating HVX – Hexagon Vector Extensions).
SA8295P (4th Gen): Kryo 685 CPU, Adreno 695 GPU, Hexagon Tensor Processor (HTP) delivering up to 30+ TOPS of NPU inference capability.
SDK Deployment:
SNPE (Snapdragon Neural Processing Engine) & QNN SDK (Qualcomm Neural Network / AI Stack).
Models are converted from ONNX/PyTorch into target Deep Learning Containers (`.dlc` files) or QNN binary graphs (`.so`).
Convolution, depthwise-separable conv, and matrix multiplication layers are mapped to run natively on the Hexagon HTP / HVX.
Non-supported activation functions or custom post-processing layers fall back to GPU (OpenCL) or CPU (NEON).

2. NXP S32G Platform

Hardware Architecture: NXP S32G274A / S32G399A network processors feature Quad/Octa Arm Cortex-A53 / Cortex-A72 cores with ASIL D Cortex-M7 real-time cores.
Deployment Workflow:
Deployed via NXP eIQ Machine Learning Software Development Environment.
Utilizes optimized C++ ONNX Runtime or TensorFlow Lite C++ runtimes using Arm NEON vector SIMD instructions on Cortex-A cores.
For tasks requiring deep neural network acceleration, inference processing is offloaded via Ethernet/PCIe to Qualcomm Snapdragon SoCs or dedicated edge NPUs.

3. NVIDIA Drive Platforms (Comparison)

Where NVIDIA Drive Orin is deployed for exterior ADAS/AD, models are optimized via TensorRT, utilizing INT8 Tensor Cores with explicit precision calibration and layer fusion.

2.4 End-to-End Inference Pipeline

A continuous pipeline processes multi-camera inputs with minimum latency:

[ Camera (MIPI-CSI2) ]

│

▼

[ Qualcomm ISP Driver ] ───(Zero-copy YUV420)───► [ FastCV / DSP Preprocessing ]

                                                              │ (Resizing/Norm)

▼

[ Renderer / Display / CAN ] ◄─── [ QNN Engine / HTP NPU ] ◄─── [ Tensor Input Buffer ]

  (Gaze Vector / 3D SVM Mesh)      (INT8 Neural Model)

Camera Ingestion: NIR (Near-Infrared) camera for DMS/MirrorSense or 4x RGB Fisheye cameras for SurroundSense feed into the SoC via MIPI CSI-2 interface.
ISP Hardware Pipeline: Image Signal Processor (ISP) executes auto-exposure, de-warping, and noise reduction outputting YUV420/NV12 frame buffers into shared memory.
Hardware-Accelerated Preprocessing: Using Qualcomm FastCV library on Hexagon DSP:
Color space conversion (YUV420 $\rightarrow$ RGB / Grayscale).
Image resizing, letterboxing, and normalization ($x_{\text{norm}} = (x – \mu) / \sigma$).
NPU Execution: Zero-copy execution via QNN SDK memory descriptors (`Qnn_Tensor_t`). Data is processed directly on the Hexagon Tensor Processor (HTP).
Post-Processing & Output:
DMS/OMS: Face mesh detection, gaze direction calculation, eye-blink rate estimation.
MirrorSense: Computes driver's 3D eye position vector relative to side-view mirror coordinates; dispatches adjustment commands over CAN-FD to side mirror motors.
SurroundSense: De-warps 4 camera feeds and stitches them onto a dynamic 3D bowl mesh for 360-degree ASVM and Transparent Chassis rendering via OpenGL ES / Vulkan.

2.5 Mixed-Criticality Integration: QNX Hypervisor & Android Automotive OS (AAOS)

To ensure functional safety while maintaining high infotainment usability, VinFast cockpit systems leverage hypervisor virtualization:

+-----------------------------------------------------------------------------------+

|                                QUALCOMM SA8155P / SA8295P                         |

+-----------------------------------------------------------------------------------+

|                                 QNX HYPERVISOR v2.x                               |

+-----------------------------------------+-----------------------------------------+

|        QNX Safety RTOS (ASIL-B/D)       |      Android Automotive OS (AAOS)       |

|  - Instrument Cluster / Head-Up Display |  - In-Vehicle Infotainment (IVI) App    |

|  - VinAI InteriorSense/MirrorSense Daemon|  - SurroundSense 360 UI / Touch2Park   |

|  - Fast-boot Rearview Camera (RVC)      |  - Media, Navigation, App Store         |

+-----------------------------------------+-----------------------------------------+

|                  Shared Memory IPC / Gralloc Buffer Management                    |

+-----------------------------------------------------------------------------------+

QNX Hypervisor: Runs directly on bare-metal silicon, creating isolated virtual machine partitions.
QNX Safety RTOS Domain:
Hosts safety-critical applications (digital cluster, telltales, fast-boot camera service).
Runs the primary VinAI DMS/MirrorSense inference daemon. If Android crashes or reboots, driver monitoring remains active and operational within ASIL constraints.
Android Automotive OS (AAOS) Domain:
Hosts rich IVI user interfaces, 3D SurroundSense rendering apps, navigation, and infotainment.
Zero-Copy Video/Buffer Sharing:
Uses QNX shared memory (`shm_open`) and Android `Gralloc` / `ION` memory allocators.
Camera frames captured by QNX ISP drivers are accessed by VinAI inference runtimes and AAOS render engines without duplicating frame buffers in memory.

Topic 3: VinFast Zonal Controller Architecture Specifics

3.1 Architectural Evolution

VinFast has transitioned its vehicle platform architecture through three distinct stages:

[ Phase 1: Distributed E/E ] ──► [ Phase 2: Domain-Based E/E ] ──► [ Phase 3: Zonal E/E Architecture ]

(VF e34 - 30+ Discrete ECUs)     (VF 8 / VF 9 - Domain HPCs)       (Limo Green, VF MPV 7, Next VF6/7)

Distributed E/E Architecture (Early Generation – VF e34):
Over 30+ independent ECUs connected via traditional CAN/LIN buses. High wiring harness weight and complex cable routing.
Domain-Based Architecture (VF 8 / VF 9):
ECUs grouped into functional domains: Infotainment Domain (Cockpit HPC), ADAS Domain (Autonomous Driving HPC), Powertrain Domain, Body Domain.
Zonal E/E Architecture (Current Next-Gen Platform – Limo Green, VF MPV 7, Next-Gen VF 6/7/8):
Divides the vehicle into physical geographical zones. Local sensors and actuators connect to nearby Zonal Control Units (ZCUs), which bridge data via high-speed Ethernet to a central High-Performance Compute (HPC) cluster.

3.2 Zone Topology & ECU Consolidation

VinFast's Zonal Architecture incorporates 4 Physical Zonal Control Units (ZCUs):

                      +-----------------------------------+

                      |   CENTRAL COMPUTE CLUSTER (HPC)   |

                      |  - Cockpit HPC (SA8155P/SA8295P)  |

                      |  - ADAS HPC (Qualcomm/NVIDIA)     |

                      |  - Central Gateway (NXP S32G3)    |

                      +-----------------+-----------------+

                                        | 1000BASE-T1 Ethernet

         +------------------------------+------------------------------+

         |                              |                              |

         v                              v                              v

+------------------+          +------------------+          +------------------+

| Front-Left Zone  |          | Front-Right Zone |          |  Rear-Left Zone  |

| Controller (ZCU) |          | Controller (ZCU) |          | Controller (ZCU) |

+--------+---------+          +--------+---------+          +--------+---------+

         |                             |                             |

         v                             v                             v

[ Front-Left Sensors/ ]       [ Front-Right Sensors/ ]      [ Rear-Left Sensors/ ]

[ Actuators / Lighting ]      [ Actuators / Radar    ]      [ Door/Window Motors ]

Consolidated ECUs per Zone:

Front-Left ZCU:
Consolidates: Front-left lighting controller, wipers, left horn, washer fluid pump, front-left wheel speed sensor aggregator, left e-Fuse power distribution channel.
Front-Right ZCU:
Consolidates: Front-right lighting controller, front radar interface, thermal management valves, AC compressor control, right e-Fuse power distribution channel.
Rear-Left ZCU:
Consolidates: Left rear door control unit (window lifter, latch, mirror heating), rear-left light cluster, tailgate motor actuator, left rear e-Fuse channel.
Rear-Right ZCU:
Consolidates: Right rear door control unit, rear-right light cluster, trailer module, rear ultrasonic sensor hub, right rear e-Fuse channel.

3.3 Compute Platforms & In-Vehicle Network Topology

Compute Hardware Allocation

Architecture Tier	Compute Platform	Processor Family	Primary OS / Software Stack
Cockpit HPC	Qualcomm Snapdragon SA8155P / SA8295P	8x Kryo CPU + Hexagon NPU	QNX Hypervisor + Android Automotive OS
ADAS/AD HPC	Qualcomm Snapdragon Ride / NVIDIA Orin	Multi-core CPU + Tensor Cores	QNX Safety RTOS / Embedded Linux
Central Zonal Gateway	NXP S32G (S32G274A / S32G399A)	Quad Cortex-A53/A72 + Quad Cortex-M7	Adaptive AUTOSAR + Classic AUTOSAR
Zonal Controllers (4x)	NXP S32K3 Series / Infineon AURIX TC3xx	Arm Cortex-M7 / TriCore	Classic AUTOSAR (FPT MaaZ Classic)

Network Protocol Breakdown

Automotive Ethernet Backbone (1000BASE-T1 / 100BASE-T1):
1000BASE-T1 (1 Gbps): Links Central Gateway (NXP S32G) to Cockpit HPC, ADAS HPC, and Zonal Controllers.
100BASE-T1 (100 Mbps): High-speed sensor feeds (IP cameras, forward radar) to ZCUs and HPCs.
Switch Architecture: NXP SJA1110 10-port Automotive Ethernet Switch with hardware Time-Sensitive Networking (TSN – IEEE 802.1Qav/Qbv) for deterministic low-latency video and control traffic.
Sub-Buses:
CAN-FD (Flexible Data-rate up to 5 Mbps): Used between ZCUs and local powertrain/chassis sensors/actuators (e.g., EPS, ESC, Brake Control, Battery Management).
LIN (Local Interconnect Network up to 20 kbps): Low-cost peripheral connections (window switches, climate buttons, interior ambient lights).

3.4 AUTOSAR Classic vs. Adaptive Split

+-----------------------------------------------------------------------------------+

|                        CENTRAL COMPUTE CLUSTER (HPCs)                             |

|                        AUTOSAR ADAPTIVE PLATFORM (ARA)                            |

|  - Dynamic C++ Application Deployment                                              |

|  - Service-Oriented Architecture (ara::com / SOME/IP)                             |

|  - High Bandwidth Processing (Cloud, OTA, ADAS, Infotainment)                      |

+-----------------------------------------------------------------------------------+

│

                                         ▼ [ SOME/IP over Ethernet ]

+-----------------------------------------------------------------------------------+

|                         ZONAL CONTROL UNITS (ZCUs)                                |

|                        AUTOSAR CLASSIC PLATFORM (BSW)                             |

|  - Static C Application Architecture (FPT MaaZ Stack)                              |

|  - Signal-Based & Real-Time Hard Determinism                                       |

|  - I/O Control, Smart e-Fuse Power Switching, CAN-FD/LIN Gateway                  |

+-----------------------------------------------------------------------------------+

3.5 Gateway & System Functions

Signal-to-Service (S2S) Translation:
Translates legacy signal-based CAN-FD message frames (e.g., wheel speed signals, battery temperature) into Service-Oriented Architecture (SOME/IP) packets published over Ethernet for consumption by Adaptive AUTOSAR applications.
Protocol Routing & PDU Router:
Routes Protocol Data Units (PDUs) cross-domain between CAN-FD, LIN, and Automotive Ethernet networks with sub-millisecond switching latency.
Centralized Security & Firewall:
Integrated Hardware Security Module (HSM) on NXP S32G / Infineon AURIX handles Secure Boot, MACsec (802.AE) Ethernet frame encryption, and SecOC (Secure On-Board Communication) verification for CAN-FD.
Includes Intrusion Detection and Prevention Systems (IDPS) filtering unauthorized packets.
OTA Update Master:
NXP S32G Central Gateway receives encrypted Over-The-Air (OTA) package bundles from the cloud, verifies signatures via HSM, and coordinates flashing across ZCUs and sub-ECUs via UDS-over-IP (DoIP).
Smart Power Distribution (e-Fuse Management):
ZCUs replace legacy mechanical relays/fuses with solid-state e-Fuses. Enables dynamic load shedding, over-current protection, and individual power channel cycling during sleep/wake states.

Technical Summary & Source References

Public Presentations, Whitepapers & Case Studies

FPT Automotive & MaaZ Documentation:
FPT Automotive Launch & Monozukuri AUTOSAR (MaaZ) Ecosystem Overview (2023–2024).
FPT Software & VinFast Strategic Technology Partnership Announcements (2023).
MaaZ Suite Product Architecture: Classic BSW, Adaptive ARA, MaaZ Studio Toolchain Specifications (`maaz.global` / `fpt.auto`).
VinAI Technical Papers & CES Showcases:
MirrorSense: AI-driven Automatic Side Mirror Adjustment System, CES 2024 Innovation Award Documentation (`vinai.io`).
VinAI Smart Mobility Suite Integration on Qualcomm Snapdragon Digital Chassis, VinAI & Qualcomm Joint Technical Release (2023).
Qualcomm SNPE / QNN Acceleration Workflows on Hexagon DSP/HTP Architecture (`qualcomm.com`).
VinFast & NXP Joint Architecture Whitepapers:
VinFast Zonal E/E Architecture Transition & NXP S32G Integration, NXP Semiconductors & VinFast Joint Announcement (`nxp.com`).
NXP S32G Vehicle Network Processors & SJA1110 TSN Ethernet Switch Reference Architectures.

Đầu tư bán dẫn toàn cầu 2026: Báo cáo YTD

1. Global Investment Figures (YTD 2026)

+-------------------------------------------------------------------------------+

|                    GLOBAL SEMICONDUCTOR CAPITAL METRICS (2026)                 |

+-----------------------------------+-------------------------------------------+

| Global Semiconductor Revenue      | $1.30 Trillion - $1.65 Trillion (Forecast)|

| Total Fab Equipment Capex         | $165.9 Billion (+23.2% YoY)               |

| 300mm Fab Equipment Capex         | $133.0 Billion (+18.0% YoY)               |

| Pure-Play Startups VC/PE Capital  | ~$9.0 Billion (through July 2026)         |

| VC/PE Median Round Size           | $60.0 Million (up from $18.5M in 2025)    |

| Top 10 VC Rounds Capital Share    | 86.5% of total VC funding                 |

| Disclosed M&A Deal Volume         | $25.0+ Billion YTD                        |

+-----------------------------------+-------------------------------------------+

1.1 Venture Capital (VC) & Private Equity (PE)

Capital Volume: Through July 2026, pure-play semiconductor device and foundry startups raised ~$9.0 billion across disclosed equity and growth rounds. This marks a sharp surge from $1.3 billion raised during the same period in 2025 and $1.8 billion in 2024.
Deal Consolidation: Total deal count dropped to 32 deals in YTD 2026 (compared to 48 in YTD 2025), demonstrating a pivot away from early-stage speculative bets toward large late-stage rounds.
Late-Stage Concentration: The median round size surged to $60.0 million (up from $18.5 million in 2025). The top 10 funding rounds captured 86.5% of all equity capital, with Series B and growth equity rounds accounting for 88.5% of capital.
Target Sectors: Memory (HBM architectures) and advanced foundry/packaging accounted for 48% of total VC capital raised.

1.2 Mergers & Acquisitions (M&A)

Transaction Value: Global semiconductor M&A activity reached over $25.0 billion YTD, led by strategic acquisitions aimed at vertical integration, IP expansion, and advanced packaging capabilities.
Strategic Shift: Consolidation is heavily focused on acquiring high-margin AI data center building blocks (silicon photonics, NPU IP, advanced power management) rather than pure horizontal scale.

1.3 Government Capital & Subsidies

Public Capital Injection: Governments globally have committed or disbursed over $75 billion in direct grants, loans, tax credits, and equity injections in 2026 YTD, led by the U.S. CHIPS Act, China's Big Fund III, Japan's METI, and the EU Chips Act framework.

2. Regional Investment Breakdown

+-------------------------------------------------------------------------------+

|                       REGIONAL INVESTMENT HIGHLIGHTS (2026)                   |

+---------------+---------------------------------------------------------------+

| Region        | Key Investment Focus & Major Announcements                    |

+---------------+---------------------------------------------------------------+

| Taiwan        | TSMC Capex: $60B-$64B (70-80% advanced nodes 2nm/A16, CoWoS)  |

| South Korea   | SK Hynix $38.3B Yongin Y2/Cheongju fabs; Samsung Yongin 2029  |

| United States | CHIPS Act: $13.1B disbursed; Commerce taking equity stakes    |

| China         | Big Fund III ($47.5B) SMIC 40.6B yuan (~$6B) consolidation    |

| Japan         | Rapidus 2nm project: ¥2.35T ($15B+) total METI backing        |

| Europe (EU)   | ESMC Dresden €10B+ fab building out; Intel Magdeburg canceled |

| Southeast Asia| Vietnam $5B plan (LG Innotek $1B); Malaysia MAPC 7% OSAT goal |

+---------------+---------------------------------------------------------------+

2.1 Taiwan

TSMC Capex Expansion: TSMC revised its 2026 capital expenditure target upward to $60 billion – $64 billion (up from $52B–$56B previously).
Process Nodes: 70%–80% of capex is dedicated to advanced nodes:
2nm (N2): Mass production scaling up across 4 fabs in Hsinchu (Baoshan) and Kaohsiung, targeting 100,000 wafers/month by late 2026.
A16 Node: Features "Super Power Rail" (SPR) backside power delivery; scheduled for production in H2 2026.
Advanced Packaging (CoWoS): 10%–20% of TSMC capex allocated to CoWoS/SoIC packaging. Capacity expansion exceeds 80% YoY, with Chip-on-Wafer (CoW) steps increasingly outsourced to OSAT partners.
Domestic Funding: Nanya Technology secured a $2.5 billion capital raise for next-generation DRAM facilities.

2.2 South Korea

Yongin Mega-Cluster Accelerated: South Korea pulled forward the target completion of the Yongin Semiconductor Cluster to 2033 (originally 2045), backed by 600 trillion won (~$435 billion) in combined long-term corporate commitments.
SK Hynix Capital Commitment: On August 7, 2026, SK Hynix approved a 54.3 trillion won (~$38.3 billion) investment package:
35.2 trillion won for the Y2 Fab in Yongin (DRAM/HBM hub; ground breaking July 2027, cleanroom June 2029).
Remainder allocated to the M17 Fab in Cheongju for advanced memory capacity.
Samsung Electronics: Accelerated its Yongin Y1 fab production timeline to 2029 (1–2 years ahead of schedule) to supply next-gen HBM4 memory.

2.3 United States

CHIPS Act Policy Evolution: As of August 2026, the U.S. Department of Commerce has disbursed $13.1 billion (~42%) of its $31.5 billion direct manufacturing grant pool.
Equity Stake Strategy: The Commerce Department established a rule requiring minority, non-controlling equity stakes in exchange for direct federal R&D/manufacturing funding.
July 29, 2026 Announcement: Signed 7 Letters of Intent (LOI) totaling $874 million in R&D incentives tied to government equity stakes (recipients include GlobalFoundries, Kepler, Multibeam, Extropic, Thintronics, Aeluma, and OBSIDIA).
Since late 2025, Commerce has negotiated equity agreements with ~30 companies, representing ~$4 billion in government equity positions.
Major Fabs: TSMC Arizona expanded its committed investment to $65 billion across three fabs; Intel, Micron, and Samsung continue major domestic fab construction.

2.4 China

Big Fund III Deployment: Established in May 2024 with 344 billion yuan (~$47.5 billion), China's National Integrated Circuit Industry Investment Fund Phase III shifted strategy in 2026 from broad fab building to critical bottleneck technologies (EUV/ArFi lithography components, high-density etching, advanced substrates, and HBM alternatives).
SMIC Equity Consolidation: In June 2026, Big Fund III became the 3rd largest shareholder in Semiconductor Manufacturing International Corporation (SMIC) after SMIC completed a 40.6 billion yuan (~$6.0 billion) acquisition of its subsidiary, SMNC, on Shanghai's STAR Market.
Ecosystem Capital: Complemented by municipal funds (e.g., Shanghai IC Fund Phase II expansion) and strategic divestments from mature Phase I/II portfolio companies (e.g., Shanghai Anlogic) to recycle capital.

2.5 Japan

Rapidus 2nm Acceleration: Japan’s Ministry of Economy, Trade and Industry (METI) increased total cumulative backing for state-backed Rapidus to ¥2.35 trillion (~$15.0+ billion).
June 2026 Capital Injection: Rapidus secured an additional ¥150 billion (~$943 million) from the Information-Technology Promotion Agency (IPA), with government equity rights reaching up to 60% in restructuring scenarios.
Fab Construction & Partnerships: Pilot line in Chitose, Hokkaido is gearing up for 2nm trial runs ahead of 2027 mass production. Rapidus signed international MOUs with UK and Italian research hubs in H1 2026.
TSMC Kumamoto: TSMC Fab 1 ramped volume production, while Fab 2 planning was finalized with METI subsidy support.

2.6 Europe (European Union)

ESMC Dresden Construction: European Semiconductor Manufacturing Company (ESMC)—a joint venture of TSMC (70%), Bosch, Infineon, and NXP—progressed into full vertical structural build-out in Dresden, Germany. Total investment exceeds €10 billion, supported by €5 billion in German/EU Chips Act subsidies. Equipment installation begins H2 2026, targeting late 2027 production.
Intel Magdeburg Project Cancellation: In July 2025/early 2026, Intel officially canceled its planned €30 billion mega-fab in Magdeburg, Germany.
Pivot to Ireland: Intel redirected European expansion capital toward its Leixlip, Ireland facility, announcing a €5 billion capacity expansion in July 2026.
STMicroelectronics: Progressed its €2 billion state-subsidized Silicon Carbide (SiC) campus in Catania, Italy.

2.7 Southeast Asia

Malaysia: The National Semiconductor Strategy (NSS) and the newly launched Malaysia Advanced Packaging Consortium (MAPC) set a target to capture 7% of the global advanced packaging market by 2035. Key investments include Chipbond’s $200 million packaging plant in Penang and Nexperia’s RM1.6 billion expansion in Seremban.
Vietnam: Approved a national $5 billion semiconductor investment plan in mid-2026. LG Innotek committed $1.0 billion for a package substrate plant in Hai Phong (breaking ground Q3 2026).
Singapore: Allocated S$800 million in government semiconductor R&D in 2026, alongside Micron’s $24 billion multi-year fab and memory packaging expansion.

3. Key Segment Analysis

       +----------------------------------------------------------------+

       |             2026 SEMICONDUCTOR SEGMENT INVESTMENT RAMP         |

       +----------------------------------------------------------------+

       | AI Accelerators   | [====================================] HIGHEST

       | Memory (HBM/DRAM) | [==================================]   VERY HIGH

       | Foundry (2nm/CoWoS)| [================================]    HIGH

       | Equipment (EUV)   | [============================]      HIGH

       | Materials & Subs. | [======================]            MEDIUM-HIGH

       | Auto & Power (SiC)| [==============]                    MODERATE

       +----------------------------------------------------------------+

3.1 Artificial Intelligence Chips & Accelerators

Market Scale: Generative AI chip revenue is projected to reach ~$500 billion in 2026.
Hyperscaler Custom ASICs: Google (TPU v6/v7), AWS (Trainium3), Meta (MTIA v2), and Microsoft (Maia 200) increased internal ASIC production, capturing ~20% of data center accelerator capital spending.
Venture Capital Boom: Startups targeting AI inference, edge compute, and innovative hardware architectures attracted mega-rounds (e.g., MatX $500M, Cerebras $1.0B).

3.2 Memory (HBM, DRAM, NAND)

HBM Capex Surge: Driven by HBM3e and upcoming HBM4 stacks, memory capex accounted for >35% of global semiconductor equipment spending.
Pricing Dynamics: HBM contract prices remained at premium levels, triggering structural DRAM capacity reallocations away from standard DDR5/LPDDR5 toward high-density HBM dies.

3.3 Foundry & Advanced Packaging

Leading Node Migration: Massive capex concentration into 2nm and 1.4nm (14A) development.
Packaging Bottleneck: CoWoS, FOWLP, and 3D heterogeneous integration represent the main capacity bottleneck for AI accelerators. Global OSAT suppliers (ASE Group, Amkor, Powertech, Inari) are scaling capex by +25% YoY.

3.4 Equipment & Materials

Record Equipment Sales: SEMI forecasts total semiconductor manufacturing equipment sales will hit a record $165.9 billion in 2026 (+23.2% YoY). 300mm fab equipment spending will reach $133.0 billion.
ASML High-NA EUV Commercialization: ASML raised 2026 revenue guidance to €36 billion – €40 billion. ASML plans to ship 10 High-NA EUV units ($380M each) and >60 total EUV systems in 2026, with Intel, TSMC, Samsung, and SK Hynix taking delivery.
Deposition & Etch: Applied Materials and Lam Research recorded strong order velocity driven by high-aspect-ratio etching for 3D NAND and High-NA EUV patterning stack layers.

3.5 Automotive & Power Electronics (SiC / GaN)

Bifurcated Growth: While mature automotive microcontrollers experienced inventory digestion during H1 2026, high-voltage Wide Bandgap (WBG) semiconductors (Silicon Carbide & Gallium Nitride) saw sustained capital investment.
Key Fabs: STMicro’s €2B SiC facility in Italy and Infineon’s 200mm SiC module fab expansion in Kulim, Malaysia.

4. Major Deals and Funding Rounds (YTD 2026)

4.1 Top Mergers & Acquisitions (M&A)

Date	Target / Partner	Acquirer / Investor	Deal Value	Strategic Focus
Q1 2026	Silicon Labs	Texas Instruments	$7.50 Billion	Wireless IoT & Analog Power portfolio expansion
June 2026	SMNC (Beijing)	SMIC (China)	40.6B Yuan ($6.00B)	Internal fab ownership & Big Fund III consolidation
Jan 2026	SkyWater Technology	IonQ	$1.80 Billion	Quantum silicon foundry integration
Q2 2026	Synopsys ARC Processor IP	GlobalFoundries / MIPS	Undisclosed Multi-Hundred M	Physical AI & Edge NPU processor IP
Feb 2026	Canopus AI	Siemens	Undisclosed	AI-driven computational metrology for wafers

4.2 Top Venture Capital & Private Equity Rounds

Date	Company	Round / Event	Amount Raised	Focus / Technology
H1 2026	Nanya Technology	Growth Equity	$2.50 Billion	Advanced DRAM & HBM facility expansion
June 2026	Rapidus	Government / IPA Round	¥150B ($943 Million)	2nm foundry mass-production pilot line
H1 2026	Cerebras Systems	Late-Stage Equity (Pre-IPO)	$1.00 Billion	Wafer-scale AI inference & training engines
H1 2026	MatX	Series B	$500 Million	Custom high-efficiency LLM training silicon
H1 2026	LG Innotek (Vietnam)	Corporate Expansion	$1.00 Billion	Advanced semiconductor package substrates
H1 2026	Chipbond (Malaysia)	Strategic Investment	$200 Million	Advanced OSAT & packaging capacity in Penang

5. Government Policy & Regulatory Impact

+-------------------------------------------------------------------------------+

|                       KEY POLICY DEVELOPMENTS IN 2026                         |

+-------------------+-----------------------------------------------------------+

| U.S. CHIPS Act    | Mandatory equity stakes (~30 deals signed, ~$4B equity);  |

|                   | $13.1B direct grants disbursed by August 2026.           |

+-------------------+-----------------------------------------------------------+

| China Big Fund III| ¥344B ($47.5B) focusing on lithography, etching, advanced |

|                   | packaging, and SMIC capital restructuring.                |

+-------------------+-----------------------------------------------------------+

| EU Chips Act      | €43B framework supporting ESMC Dresden (€5B subsidy);     |

|                   | Shift in strategy following Intel Magdeburg cancellation.  |

+-------------------+-----------------------------------------------------------+

| Japan METI        | Cumulative ¥2.35T ($15B+) for Rapidus 2nm; equity rights  |

|                   | enforcement in state-backed semiconductor ventures.       |

+-------------------+-----------------------------------------------------------+

U.S. Mandatory Equity Recourse: The U.S. Commerce Department's transition toward demanding minority equity stakes in return for CHIPS Act funding ensures taxpayers participate in corporate upside, but introduces complex governance dynamics for recipient firms.
China’s Targeted Import Substitution: Big Fund III avoids general-purpose trailing-node expansion, focusing capital directly onto "chokepoint" toolmakers (ASML/Applied Materials alternatives) to counter export controls.
European Subsidization Realities: European semiconductor policy is adjusting after Intel’s cancellation of its Magdeburg project, pivoting funding toward specialized automotive/industrial foundries (ESMC) and packaging research.

6. Market Trends & Outlook for Remainder of 2026

Revenue Crossing the $1.3T Threshold: Global semiconductor sales will set an all-time record in 2026, driven by persistent server GPU and custom ASIC demand.
Capex Polarization: Over 60% of worldwide fab equipment capex will be concentrated among five key spenders: TSMC, Samsung, SK Hynix, Intel, and SMIC.
Execution Risks in Leading Nodes: Mass production of 2nm dies at TSMC and trial runs at Rapidus in late 2026/early 2027 will test yield stability and High-NA EUV lithography throughput.
Sovereign Infrastructure Realignment: Geopolitical trade barriers are permanently altering capital allocation, forcing semiconductor firms to build redundant localized supply chains across North America, East Asia, and Europe.

Primary References & Data Sources

Semiconductor Industry Association (SIA) & World Semiconductor Trade Statistics (WSTS) 2026 Market Reports.
SEMI Mid-Year 2026 Total Semiconductor Equipment Forecast & 300mm Fab Outlook.
U.S. Department of Commerce / CHIPS.gov Implementation Updates (July–August 2026).
China National Integrated Circuit Industry Investment Fund (Big Fund III) STAR Market filings (June 2026).
TSMC, SK Hynix, Samsung Electronics, ASML, Rapidus Corporate Quarterly Filings & Board Announcements (Q1–Q3 2026).

11 Tháng 8, 2026

FDI toàn cầu ngành điện tử & bán dẫn 2026: Xu hướng Greenfield

2. FDI Flow Statistics by Destination Country (2026 YTD)

FDI destination dynamics highlight a strong shift toward reshoring in North America and Western Europe, combined with rapid high-tech manufacturing upgrades in Southeast Asia and South Asia.

pie title Global Semiconductor FDI Destinations (2026 YTD Shares)

    "United States" : 42

    "Japan" : 18

    "European Union" : 14

    "India" : 12

    "Southeast Asia (Vietnam, MY, SG)" : 10

    "Rest of World" : 4

Destination Country Summary:

United States (~$60B+ active capex/FDI in 2026 YTD):
Recipient of the world's largest single greenfield announcements (TSMC, Samsung, Micron, SK Hynix, Amkor).
Supported by $39B in direct CHIPS Act grants and the 25% Advanced Manufacturing Tax Credit.
Japan (~$25B+ active FDI & public-private investment):
Rapidly emerging as a global chip powerhouse with TSMC JASM (Kumamoto Fab 1 & Fab 2), Rapidus (Hokkaido 2nm), Micron (Hiroshima EUV DRAM), and Samsung R&D/Advanced Packaging Center (Yokohama).
European Union (~$18B+ active project capex):
Key hubs in Germany (Silicon Saxony – Dresden, Magdeburg), France (Crolles), Poland (Wroclaw OSAT), and Italy (Catania SiC Megafab).
India (~$15B+ total committed capex):
Rapid leap into fab & OSAT manufacturing under India Semiconductor Mission (ISM 1.0 & 2.0). Projects led by Tata Electronics, CG Power, Kaynes Technology, and Micron Sanand OSAT.
Southeast Asia (Vietnam, Malaysia, Singapore):
Vietnam: Shifted focus from low-cost assembly to high-value packaging, substrate manufacturing (LG Innotek, Amkor, Hana Micron), and IC design (Synopsys, Marvell, Nvidia partnerships).
Malaysia: Dominates regional backend OSAT with expansion in Penang and Kulim (Infineon 200mm SiC fab – €5B total investment).
Singapore: Focuses on specialty analog, MEMS, and silicon photonics (GlobalFoundries expansion, UMC 12i expansion, Vanguard-NXP 300mm JV).

3. Application Breakdown & End-Market Target Dynamics

The $200B global capex deployment in 2026 YTD is concentrated across key end-market applications:

+-------------------------------------------------------------------------------+

|                        2026 YTD FDI APPLICATION BREAKDOWN                    |

+-------------------------------------------------------------------------------+

|  [████████████████████████████████████████] 48% - AI / HPC & Data Infrastructure |

|  [████████████████████] 22% - Automotive, EV & Power Electronics (SiC/GaN)     |

|  [████████████] 14% - Industrial Automation, Robotics & Edge AI               |

|  [████████] 9% - Telecom, 5G/6G & Networking                                   |

|  [█████] 7% - Consumer Electronics & Defense/Aerospace                        |

+-------------------------------------------------------------------------------+

AI / HPC & Data Infrastructure (48%):
Logic Fabs: 3nm / 2nm GAA process nodes for GPUs, TPUs, and AI accelerators (TSMC Phoenix, Rapidus Hokkaido).
Memory: HBM3e and HBM4 12-layer/16-layer stacks (SK Hynix, Micron, Samsung).
Packaging: CoWoS, 3D IC stacking, and Glass Substrates (Amkor, Intel, LG Innotek, SKC Absolics).
Automotive & EV Power Electronics (22%):
High demand for Silicon Carbide (SiC) power modules for 800V EV powertrains, inverter systems, and ADAS processors (STMicroelectronics Chongqing JV, Infineon Kulim, ESMC Dresden).
Industrial Automation & Edge AI (14%):
Sensor hubs, microcontrollers (MCUs), industrial IoT, and power management ICs (PMICs).
Telecom & 5G/6G Networking (9%):
RF front-end modules, optical transceivers for hyperscale AI datacenters, and satellite communications.
Consumer Electronics & Defense (7%):
Displays, image sensors, secure hardware security modules (HSM), and radiation-hardened microchips.

4. Country of Origin of Investors (Outbound FDI Analysis)

graph TD

    Taiwan["Taiwan (TSMC, PSMC, ASE)"] -->|Outbound FDI| US1["USA (TSMC $100B)"]

    Taiwan -->|Outbound FDI| EU1["Germany (ESMC $11B)"]

    Taiwan -->|Outbound FDI| IN1["India (Tata-PSMC $11B)"]

    Taiwan -->|Outbound FDI| JP1["Japan (JASM $20B+)"]

    SK["South Korea (SK Hynix, Samsung, LG)"] -->|Outbound FDI| US2["USA (Samsung $44B, SK Hynix $3.8B)"]

    SK -->|Outbound FDI| VN1["Vietnam (LG Innotek $1B, Hana Micron)"]

    US["USA (Micron, Intel, Amkor, TI)"] -->|Outbound FDI| EU2["EU / Poland (Intel OSAT)"]

    US -->|Outbound FDI| VN2["Vietnam (Amkor $1.6B)"]

    US -->|Outbound FDI| JP2["Japan (Micron Hiroshima)"]

    EU["EU (STMicro, Infineon, NXP)"] -->|Outbound FDI| CN1["China (STMicro JV $3.2B)"]

    EU -->|Outbound FDI| MY1["Malaysia (Infineon Kulim €5B)"]

Taiwan: Dominates leading-edge logic and foundry FDI (TSMC leading investments in US, Japan, and Germany; PSMC in India).
South Korea: Outbound focus on HBM packaging (SK Hynix Indiana fab, US) and high-density substrates/OSAT in Vietnam.
United States: Memory & packaging FDI flowing to Japan, Vietnam, Malaysia, and Europe, alongside massive domestic investments.
Japan: Equipment and material suppliers (Tokyo Electron, Murata, Shin-Etsu) establishing local subsidiaries alongside core destination fabs in the US and SE Asia.
EU: Specialized power electronics and automotive semiconductor investments (Infineon in Malaysia, STMicro in China/Italy).

5. Incentive Packages & Subsidy Frameworks (2026 Matrix)

Governments have transitioned from standard tax credits to direct cash grants, co-equity funding, and infrastructure subsidies:

Region / Policy	Direct Grant / Subsidy Ratio	Tax Credits & Relief	Key 2026 Projects Benefiting
US CHIPS Act ($52.7B Total)	Up to 15–20% of Capex direct grant	25% Advanced Manufacturing Investment Credit (Section 48D)	TSMC ($6.6B), Samsung ($6.4B), Micron ($6.1B), Intel ($8.5B), Amkor ($400M)
EU Chips Act (€43B Framework)	Up to 50% State Aid matching for first-of-a-kind fabs	National R&D credits & energy price caps	ESMC Dresden (€5B subsidy), ST/GF Crolles, Intel Magdeburg
Japan METI Program ($25B+ Fund)	Up to 33% to 50% CAPEX direct cash grants	Special depreciation allowances	TSMC JASM Kumamoto (¥1.2T subsidy), Rapidus (¥1T+), Micron Hiroshima
India ISM 2.0 ($10B+ Fund)	Flat 50% Central Government Financial Support	20–25% Additional State Government Subsidy + Duty-free capital imports	Tata-PSMC Dholera Fab ($11B), CG Power JV, Kaynes Semi, Micron Sanand
Vietnam Decree 182/2024 & Digital Law	Direct cash support covering up to 50% of initial R&D costs	5% Corporate Income Tax for up to 37 years + 6-year full tax exemption	Amkor Bac Ninh, LG Innotek Hai Phong, GlobalTech Bac Ninh

6. Major Joint Ventures (JVs) & Cross-Border Partnerships (2026 YTD)

To hedge geopolitical risk and reduce astronomical capital requirements, cross-border JVs have become the standard execution vehicle for greenfield projects:

ESMC (European Semiconductor Manufacturing Company)
Partners: TSMC (70%), Bosch (10%), Infineon (10%), NXP Semiconductors (10%).
Scope: $11 Billion 300mm fab in Dresden, Germany, targeting automotive and industrial microcontroller manufacturing.
Tata Electronics & PSMC Strategic Partnership
Partners: Tata Group (India) & Powerchip Semiconductor Manufacturing Corp (Taiwan).
Scope: Building India's first commercial $11B foundry in Dholera, Gujarat, producing 28nm/55nm chips.
STMicroelectronics & SICC Joint Venture
Partners: STMicroelectronics (Switzerland/EU) & ShanXi SanAn / SICC (China).
Scope: $3.2 Billion 200mm Silicon Carbide (SiC) epitaxy and substrate manufacturing facility in Chongqing, China.
Vanguard International Semiconductor (VIS) & NXP JV (VisionPower Semiconductor Manufacturing)
Partners: VIS (Taiwan – 60%) & NXP Semiconductors (EU – 40%).
Scope: $7.8 Billion 300mm wafer fab in Singapore producing 130nm to 40nm mixed-signal, power management, and analog chips.
CG Power, Renesas & Stars Microelectronics JV
Partners: CG Power (India – 92%), Renesas Electronics (Japan – 6%), Stars Microelectronics (Thailand – 2%).
Scope: $900 Million advanced OSAT plant in Sanand, Gujarat, India.

7. Strategic Outlook & Key Takeaways for 2026-2028

Advanced Packaging is the New Bottleneck: Capex is shifting rapidly from pure front-end wafer fab construction to advanced back-end 2.5D/3D packaging and high-density substrate manufacturing (FC-BGA, Glass Substrates).
Southeast Asia & India Shift Upward: Vietnam, Malaysia, and India are successfully transitioning from low-margin assembly/testing to high-value OSAT, compound semiconductors (SiC/GaN), and foundry manufacturing.
Subsidy Competition Driving Regional Polarization: Capital allocation is heavily determined by state grant matching (e.g., US, Japan, EU, India funding 30% to 70% of total project costs), creating permanent new semiconductor ecosystems globally.

Sources & References:

US Department of Commerce / CHIPS Program Office (2026 Announcements)
European Commission State Aid Approvals & EU Chips Act Dossier
Japan Ministry of Economy, Trade and Industry (METI) Semiconductor Strategy Reports
India Semiconductor Mission (ISM) Ministry of Electronics and Information Technology (MeitY)
Vietnam Ministry of Planning and Investment (MPI) & Decree No. 182/2024/ND-CP
Corporate Press Releases: TSMC, SK Hynix, Micron Technology, Samsung Electronics, Tata Electronics, STMicroelectronics, Infineon Technologies, Amkor Technology.

11 Tháng 8, 2026

Đầu tư điện tử & bán dẫn Việt Nam 2026: Báo cáo toàn cảnh

1. Major Project & Factory Announcements (2026 YTD & Recent Pipeline)

The table below details major newly announced and expanded electronics and semiconductor facilities operating or entering production phases in 2026 YTD:

Investor / Company	Country of Origin	Location (Province/City)	Investment Amount	Tech Focus / Value Chain Segment	Annual Capacity / Scale	Project Timeline & Milestone
Amkor Technology	USA	Bac Ninh (Yen Phong II-C IP)	$1.6B (scaling to $2.67B)	Advanced OSAT, System-in-Package (SiP), 2.5D/3D Packaging	1.2 billion units/yr at full phase	Ramp-up Phase 2 in 2026; high-volume production for high-performance computing (HPC) & mobile
LG Innotek	South Korea	Hai Phong (Trang Due IP)	$1.0B (expansion)	Semiconductor Packaging Substrates (FC-BGA, FC-CSP)	Millions of high-layer substrates/mo	Factory construction completed early 2026; commercial mass production H2 2026
Victory Giant Technology	China	Bac Ninh (VSIP Bac Ninh II)	$520M (Phase 1: $260M)	High-Precision PCBs, HDI Boards, Rigid-Flex for AI/HPC	4 million m² PCB/yr by 2030 ($900M revenue potential)	Groundbreaking March 2025; machinery setup Apr–Jul 2026; trial run Jul–Sep 2026; operational Oct 2026
Coherent Corp.	USA	Dong Nai (Nhon Trach II IP)	$127M+ (30,000m² expansion)	Compound Semiconductors (Silicon Carbide – SiC), Optoelectronics	Wafers & optoelectronic modules for AI data centers	Expansion lease signed June 2026; full operational scale target late 2026 (6,500 employees)
Hana Micron	South Korea	Bac Giang (Vans Trung IP) & Bac Ninh	$1.0B (cumulative target)	Memory Packaging (DRAM/NAND OSAT), Flip-Chip	Tens of millions of memory modules/mo	Expansion phase operational in 2026; supplying major South Korean memory chipmakers
Intel Products Vietnam (IPV)	USA	Ho Chi Minh City (SHTP)	Cumulative $1.5B+ (Roadmap to $4.1B)	Advanced Chip Assembly & Test, Data Center Chipsets	Largest test/assembly site globally in Intel’s network	Line upgrades in 2026 for server & AI processor packaging transfer
Marvell Technology	USA	Ho Chi Minh City & Da Nang (ICT1 Park 2)	$50M+ (R&D Center expansion)	IC Design (AI Data Center ASIC, High-Speed Optical DSPs)	Multi-team design center (>300 engineers)	Da Nang & HCMC eTown6 advanced lab facilities expanded in 2025–2026
VSAP LAB (Da Nang)	Vietnam / USA Consortium	Da Nang (High-Tech Park)	~$72M (1,800B VND)	Prototype Packaging & Testing Lab	Shared-user prototype packaging line	Equipment installation ongoing; target operation late 2026
Lam Research Ecosystem (via Seojin)	USA / S. Korea	Bac Ninh & Bac Giang	$1.0B–$2.0B (phase 1 pipeline)	Wafer Fabrication Equipment Components & Precision Tools	Precision machining & sub-assemblies for WFE	Supply chain integration accelerating in 2026 with local tier-1 suppliers
Cooler Master	Taiwan / HK	Bac Ninh (Gia Binh IP)	$200M (Phase 1; scaling to $3B vision)	AI Server Thermal Modules, Liquid Cooling for Semiconductor Systems	Advanced thermal management systems for AI chips	Initial facility active in 2026 YTD

2. Comprehensive Policy Framework & Investment Incentives

Vietnam’s policy ecosystem underwent an overhaul to secure top-tier semiconductor manufacturing and design FDI:

                          ┌────────────────────────────────────────────────────────┐

                          │   National Semiconductor Strategy (Decision 1018/QĐ)   │

                          │               Formula: "C = SET + 1"                   │

                          └───────────────────────────┬────────────────────────────┘

│

         ┌────────────────────────────────────────────┼────────────────────────────────────────────┐

         │                                            │                                            │

┌────────▼──────────────────────────┐    ┌────────────▼──────────────────────────┐    ┌────────────▼──────────────────────────┐

│ Decree 182/2024/NĐ-CP             │    │ Digital Technology Industry Law       │    │ Talent Development (Decision 1017/QĐ) │

│ Investment Support Fund           │    │ (Law 71/2025/QH15 - Eff. Jan 2026)    │    │ 50,000 Engineers by 2030              │

├───────────────────────────────────┤    ├───────────────────────────────────────┤    ├───────────────────────────────────────┤

│ • Direct cash grants up to 50%    │    │ • 5% Corporate Income Tax for 37 yrs  │    │ • 42,000 design & OSAT engineers      │

│   for R&D & initial capex         │    │ • 6 yrs Tax Holiday (0%) + 13 yrs 50% │    │ • 7,500 postgraduates / PhDs          │

│ • Subsidies for training & infra  │    │ • 22 yrs Land Lease Exemption (100%)  │    │ • 5,000 compound semi specialists     │

│ • Minimum threshold: 6,000B VND   │    │ • 200% R&D expense tax deduction      │    │ • National Prototyping Center subsidy │

└───────────────────────────────────┘    └───────────────────────────────────────┘    └───────────────────────────────────────┘

A. Decree 182/2024/NĐ-CP (Investment Support Fund – Quỹ Hỗ trợ Đầu tư)

Enactment & Effective Date: Signed December 31, 2024; fully operational for fiscal years 2024–2026 under the Ministry of Planning and Investment (MPI).
Objective: Mitigates the impact of Global Minimum Tax (GMT 15% Pillar Two) by shifting from tax-only incentives to direct cash financial support.
Eligibility Criteria for Semiconductor/AI:
Minimum capital scale of VND 6,000 billion (~$240M) or annual revenue of VND 10,000 billion (~$400M).
IC Design Exemption: No minimum capital required for pure IC design projects, provided the investor commits to employing at least 300 Vietnamese engineers and training 30 high-tech engineers annually.
Support Categories:
Up to 50% direct subsidy for initial capital expenditure (capex) on R&D center equipment in semiconductors and AI.
Direct subsidies for human resource training costs, high-tech product manufacturing costs, and social infrastructure investments.

B. Digital Technology Industry Law (Law No. 71/2025/QH15)

Status: Passed by the National Assembly on June 14, 2025; effective January 1, 2026.
Super-Incentives for Mega Projects (≥ VND 6,000B investment in Semiconductor / AI / High-Performance Computing):
Corporate Income Tax (CIT): Special preferential rate of 5% for 37 years (standard CIT is 20%).
Tax Holidays: 100% tax exemption for the first 6 years, followed by a 50% reduction for the next 13 years.
Land Rental: 100% land & water surface fee exemption for 22 years, and a 75% fee reduction for the remaining lease term.
R&D Deductions: Companies can deduct 200% of actual R&D expenses when calculating taxable income.
Personal Income Tax (PIT): 5-year 100% PIT exemption for foreign and domestic top-tier semiconductor experts working in designated high-tech zones.

C. Decision 1018/QĐ-TTg (National Semiconductor Strategy to 2030, Vision 2050)

Promulgated: September 21, 2024.
Guiding Formula: "C = SET + 1" (Chip = Specialized + Electronics + Talent + 1 Vietnam).
Strategic Targets:
Phase 1 (2024–2030): Attract selective FDI; build ≥100 design firms, 1 small-scale fab (prototyping/specialized), and 10 OSAT/packaging plants. Semiconductor revenue >$25B/yr; electronics revenue >$225B/yr.
Phase 2 (2030–2040): Self-reliance & scaling; ≥200 design firms, 2 fabs, 15 OSAT plants. Semiconductor revenue >$50B/yr.
Phase 3 (2040–2050): Global mastery; annual semiconductor revenue >$100B/yr.

D. Special Economic Zone (SEZ) & Free Trade Zone (FTZ) Policies

Da Nang (Resolution 136/2024/QH15): Grants Da Nang pilot mechanisms to establish the Da Nang Free Trade Zone, offering simplified customs, controlled regulatory sandboxes, land allocation priority for semiconductor parks, and municipal R&D grants up to 50%.
Hai Phong Free Trade Zone (Mid-2026 Initiative): Multi-functional FTZ connected directly to Lach Huyen Deep-Water Port, granting zero-tariff bonded storage for raw wafers, chemicals, and specialized semiconductor equipment.

3. Provincial FDI Breakdown & High-Tech Ecosystem Dynamics (2026 YTD)

Vietnam’s semiconductor and electronics FDI is heavily concentrated in four key clusters:

┌─────────────────────────────────────────────────────────────────────────────────────────────┐

│                            VIETNAM HIGH-TECH FDI REGIONAL CLUSTERS                          │

├──────────────────────────────┬──────────────────────────────┬───────────────────────────────┤

│ NORTHERN HUB                 │ CENTRAL HUB                  │ SOUTHERN HUB                  │

│ • Bac Ninh: OSAT, PCB, AI    │ • Da Nang: IC Design, R&D,   │ • HCMC (SHTP): Testing, Fab   │

│ • Hai Phong: Substrates, FTZ │   Prototype Packaging        │   Equipment R&D, Design       │

│ • Bac Giang: Memory OSAT     │ • Central Tech Corridor      │ • Dong Nai: SiC, Materials    │

└──────────────────────────────┴──────────────────────────────┴───────────────────────────────┘

       2026 YTD Total FDI Inflow Shares by Key High-Tech Regions (Est.)

       ┌─────────────────────────────────────────────────────────────┐

       │ Bac Ninh       ██████████████████████ 28%                    │

       │ Hai Phong      ██████████████████ 24%                        │

       │ HCMC / SHTP    ██████████████ 18%                            │

       │ Dong Nai       ██████████ 12%                                │

       │ Da Nang        ████████ 9%                                   │

       │ Others         █████ 7%                                      │

       └─────────────────────────────────────────────────────────────┘

Provincial Profiles:

Bac Ninh Province:
Status: Premier semiconductor assembly and packaging center in Southeast Asia.
2026 YTD FDI Performance: Attracted ~$3.5B+ in total FDI in 2026 YTD. Industrial production index grew ~19.5% YoY.
Anchor Investors: Amkor ($1.6B–$2.67B), Victory Giant ($520M PCB), Cooler Master ($200M), Samsung Electronics (Smartphone/Display integration).
Strategic Assets: Gia Binh Industrial Park, VSIP Bac Ninh II, Yen Phong II-C; planned Gia Binh Cargo Airport.

Hai Phong City:
Status: Leading hub for electronics components, optical sensors, and advanced packaging substrates.
2026 YTD FDI Performance: Reached $3.26 billion in Jan–July 2026 (+71.8% YoY).
Anchor Investors: LG Innotek ($1B FC-BGA expansion), Lite-On, Rorze Robotech, Shin-Etsu (rare earth processing materials).
Strategic Assets: Lach Huyen Deep-Sea Port, Trang Due IP, Dinh Vu – Cat Hai Economic Zone, Hai Phong FTZ.

Ho Chi Minh City (Saigon Hi-Tech Park – SHTP):
Status: Mature high-tech hub focusing on chip testing, IC design, and AI datacenter integration.
2026 YTD FDI Performance: Sustained capital inflow exceeding $1.8B in electronics & IT services.
Anchor Investors: Intel Products Vietnam ($1.5B+), Marvell Technology (eTown6 R&D hub), Besi, Microchip, Renesas.
Strategic Assets: SHTP Training Center (SHTC), Semiconductor Design Center (SDEC).

Da Nang City:
Status: Fastest-growing node for IC Design, EDA software, and specialized R&D.
2026 YTD FDI Performance: Over 70 semiconductor and AI enterprises registered.
Anchor Investors: Marvell (ICT1 Park 2 office), Synopsys, Uniquify, Renesas, FPT Semiconductor, VSAP LAB ($72M packaging lab).
Strategic Assets: Da Nang Software Park No. 2, DSAC (Da Nang Semiconductor and AI Center), Da Nang Hi-Tech Park.

4. Value Chain Mapping: Vietnam’s Position in 2026

   UPSTREAM                   MIDSTREAM                   DOWNSTREAM

┌──────────────┐           ┌──────────────┐            ┌──────────────┐

│  IC DESIGN   │           │  FABRICATION │            │ ADVANCED OSAT│

│  (Strong)    │           │ (Emerging/R&D)│           │   (Dominant) │

├──────────────┤           ├──────────────┤            ├──────────────┤

│ • Marvell    │           │ • National   │            │ • Amkor      │

│ • Synopsys   │ ───────►  │   Prototyping│ ─────────► │ • Hana Micron│

│ • FPT Semi   │           │   Center     │            │ • Intel IPV  │

│ • Viettel    │           │ • 1 Proposed │            │ • LG Innotek │

│ • Alchip     │           │   Analog Fab │            │   (Substrate)│

└──────────────┘           └──────────────┘            └──────────────┘

       │                                                      ▲

       │                                                      │

       └────────────────── MATERIALS & SiC ───────────────────┘

                           ┌──────────────┐

                           │ • Coherent   │

                           │   (SiC Wafer)│

                           │ • Victory G. │

                           │   (HDI/PCB)  │

                           └──────────────┘

OSAT & Advanced Packaging (Primary Dominance):
Vietnam has solidified its spot as a global OSAT alternative to East Asia. Amkor's Bac Ninh plant (2.5D/3D SiP technology) and Hana Micron's Bac Giang memory packaging are at the center of global AI and mobile supply chains.

Packaging Substrates (FC-BGA / HDI):
LG Innotek's $1.0B investment in Hai Phong marks Vietnam's entry into high-layer Flip-Chip Ball Grid Array (FC-BGA) substrate manufacturing—a crucial bottleneck component for advanced AI logic units.
Victory Giant Technology's $520M project provides multi-layer HDI PCBs for AI servers and GPUs.

IC Design & EDA Infrastructure (High Value Growth):
Over 50 IC design companies operate in Vietnam as of 2026 YTD (aiming for 100 by 2030).
Domestic players like FPT Semiconductor and Viettel High Technology are designing power management ICs (PMIC), IoT chips, and 5G RF transceivers.
Global leaders Marvell, Synopsys, Cadence, and Renesas employ over 5,000 design engineers across HCMC, Hanoi, and Da Nang.

Compound Semiconductors (SiC / GaN):
Coherent Corp. is leading Silicon Carbide (SiC) crystal growth and optoelectronic packaging in Dong Nai. SiC is critical for Electric Vehicles (EVs), renewable energy inverters, and high-voltage power electronics.

Equipment & Materials Supply Chain:
Lam Research is actively building out a local tier-1 precision components ecosystem (partnered with Seojin) to manufacture sub-assemblies for semiconductor wafer fabrication equipment (WFE).

5. Major Foreign Investors by Country of Origin

Country / Region	Cumulative & 2026 Key Flagship Investors	Key Strategic Focus Areas
United States	Amkor Technology, Intel, Marvell, Synopsys, Cadence, Coherent, Lam Research, Qualcomm, NVIDIA	Advanced OSAT, IC Design tools, AI datacenters, SiC substrates, WFE tools
South Korea	Samsung Electronics, LG Innotek, Hana Micron, Signetics	FC-BGA Substrates, Memory Packaging, Smartphone integration, Display drivers
Japan	Renesas Electronics, Rorze Robotech, Shin-Etsu Chemical, Tokyo Electron	Analog IC design, Robotics, Rare-earth materials, Wafer handling equipment
Taiwan	Foxconn, Pegatron, Victory Giant (via HK), Alchip Technologies, Cooler Master	AI server PCBs, Thermal modules, EV chips, Contract manufacturing & design
Singapore	STMicroelectronics, VSIP JV, Sembcorp Infrastructure	Industrial park infrastructure, Power grid solutions, Microcontroller sales & design
European Union	Infineon Technologies (Hanoi), ASML (sourcing), Bosch (Automotive R&D)	Power semiconductors, Automotive sensors, Embedded software R&D
China	Luxshare-ICT, Goertek, AAC Technologies, BYD	Acoustic components, Smart wearables, EV power modules, Assembly

6. Workforce & Talent Initiatives

The Vietnamese government and private sector are executing Decision 1017/QĐ-TTg to build a workforce of 50,000 semiconductor engineers by 2030:

                       50,000 SEMICONDUCTOR WORKFORCE BREAKDOWN (BY 2030)

       ┌────────────────────────────────────────────────────────────────────────┐

       │ 15,000 IC Design Engineers                                             │

       │ 27,000 OSAT, Substrates, Manufacturing & Quality Control               │

       │ 5,000 Compound Semiconductor Specialists (SiC/GaN)                    │

       │ 3,000 Postgraduates, Master's & PhD Researchers                         │

       └────────────────────────────────────────────────────────────────────────┘

Key Higher Education & Lab Partnerships (2025–2026):

National Innovation Center (NIC): Operating dedicated Synopsys and Cadence EDA Chip Design Centers in Hanoi (Hoa Lac) and HCMC. NIC offers licensed software suites to local startup design firms and universities.
Vietnam National University (VNU Hanoi & VNU HCMC): Launched new Semiconductor & Microelectronics degree programs, targeting 1,500 graduates/year starting in 2026.
Da Nang University & DSAC: Partnered with Synopsys, Marvell, and Arizona State University (ASU) to run train-the-trainer (TTT) courses, certifying 500 IC design lecturers.
FPT & Phenikaa Universities: Opened private semiconductor academies with cleanrooms for hands-on packaging and wafer-handling practice.
National Semiconductor Chip Prototyping Center (Launched 2026): Subsidizes MPW (Multi-Project Wafer) tape-out costs for university researchers and local design startups.

7. Infrastructure Readiness: Power, Water, & Logistics

Semiconductor manufacturing requires ultra-reliable power (zero voltage sags), pure water, and rapid cold-chain logistics.

A. Power Grid Reliability & PDP8 Execution

500kV Circuit 3 Transmission Line: Completed in August 2024 (connecting Quang Trach to Pho Noi). Fully operational in 2026 YTD, guaranteeing continuous 500kV electricity supply to Northern industrial centers (Bac Ninh, Bac Giang, Thai Nguyen, Hai Phong) and eliminating power outage risks seen in 2023.
Direct Power Purchase Agreement (DPPA) Mechanism (Decree 80/2024/NĐ-CP): Allows high-tech semiconductor plants to purchase renewable energy directly from private solar/wind generators, helping MNCs satisfy global RE100 requirements.

B. Water Supply & Industrial Waste Treatment

Major semiconductor parks (e.g., Yen Phong II-C, VSIP Bac Ninh II, Trang Due) have built dedicated Ultrapure Water (UPW) filtration facilities and advanced industrial wastewater treatment facilities capable of handling chemical etching residues.

C. Strategic Logistics Megaprojects

Lach Huyen Deep-Water Port (Hai Phong): Berths 3, 4, 5, and 6 active in 2025–2026, handling direct shipping container routes to North America and Europe.
Long Thanh International Airport (HCMC Region): Flight testing phase in 2026; will serve as the primary air cargo gateway for high-value semiconductor exports from Southern Vietnam.
Gia Binh International Airport (Bac Ninh): Specialized dual-use cargo airport dedicated to high-tech electronic shipments.

8. Comparative Matrix: 2023–2025 Baselines vs. 2026 YTD

Metric / Dimension	2023 Baseline	2024 Baseline	2025 Baseline	2026 YTD
Total Registered FDI (All Sectors)	$36.6 Billion	$38.2 Billion	$41.5 Billion	$38.0 Billion (Jan–Jul alone; +58% YoY)
Manufacturing FDI Share	$23.5 Billion	$24.8 Billion	$27.1 Billion	$18.68 Billion (Jan–Jul)
Primary Value Chain Focus	Assembly, Consumer Electronics	Initial Packaging Expansion	Advanced OSAT & EDA Design	Advanced Packaging (2.5D/3D), FC-BGA Substrates, SiC, IC Design
Key Incentive Model	Standard Tax Holidays	GMT Uncertainty (Pillar 2)	Passage of Law 71/2025	Decree 182/2024 Cash Grants + 5% CIT for 37 Years
IC Design Companies in VN	~30 firms	~40 firms	~50 firms	>65 firms actively designing
Semiconductor Workforce	~5,000 engineers	~7,000 engineers	~10,000 engineers	~14,000 engineers (on track for 50k by 2030)
Power Infrastructure	Localized Grid Shortages	Circuit 3 Construction	Circuit 3 Commissioning	Robust 500kV Circuit 3 Active + DPPA Renewable Options

9. Key Challenges & Outlook for H2 2026

Key Challenges:

Senior Engineering Talent Gap: While junior engineer enrollment has surged, there is an acute shortage of senior principal engineers (10+ years experience) capable of leading full-mask Tape-Outs or complex Analog/RF circuit designs.
Capital Expenditure Intensity for Fabrication: Attracting a full-scale commercial logic Wafer Fab ($5B–$10B capex) remains difficult due to intense regional subsidy competition from the US (CHIPS Act), Japan, Europe, and India.
Deepening Tier-2/Tier-3 Supply Chains: Domestic Vietnamese suppliers still primarily provide packaging boxes, plastic molding, or basic logistics rather than high-purity industrial gases, silicon wafers, or photolithography chemicals.

Strategic Outlook for H2 2026:

FDI Inflow Forecast: Total registered FDI for full-year 2026 is projected to hit a record $45B–$48B, with semiconductor and AI-related infrastructure contributing over $15B.
First Wave of Grants under Decree 182/2024: The Ministry of Planning and Investment (MPI) will disburse the first tranche of cash support grants from the Investment Support Fund to qualified projects (Amkor, LG Innotek, Victory Giant).
Expansion of IC Design Tape-Outs: Domestic design firms (FPT, Viettel) and international centers (Marvell, Alchip) are scheduled to execute multiple tape-outs in 28nm, 12nm, and 7nm process nodes by Q4 2026.
Consolidation of Vietnam’s Position: Vietnam is firmly established as a critical, resilient node in the global semiconductor ecosystem ("SET + 1"), balancing assembly/testing dominance with rapid design and compound semiconductor capabilities.

Report compiled from empirical data, government decrees (Decree 182/2024/NĐ-CP, Law 71/2025/QH15, Decision 1018/QĐ-TTg), MPI FDI statistics, and corporate disclosures as of August 2026.

11 Tháng 8, 2026

VinFast Q1 2026: Kết quả tài chính & kinh doanh

1. Key Financial Highlights

Metric	Q1 2026 Value	YoY Change (vs. Q1 2025)	FY 2025 Context
Total Revenue	VND 23,111.1B (~$920.7M USD)	📈 +41.7%	$3.6 Billion USD (+105.4% YoY)
Net Loss	VND 28,108.0B (~$1,119.8M USD)	📉 Loss expanded	Heavy investment phase
Gross Margin	-73.6% (Reported)<br>-22.5% (Adjusted)*	Impacted by one-offs	Gradual improvement trend

> [!NOTE]

> \* The reported gross margin of -73.6% includes a $192 million revenue deduction associated with VinFast's extended free charging programs. Excluding one-time items, the adjusted gross margin stood at -22.5%.

2. Vehicle Deliveries & Sales Breakdown

Electric Vehicles (EVs) & E-Mobility Volume

Q1 2026 EV Deliveries: 58,577 units globally (a 61% YoY increase).
International Share: International markets accounted for approximately 8% of total Q1 EV deliveries.
Q1 2026 Two-Wheeler Deliveries: 143,136 e-scooters and e-bikes (a 219% YoY surge).
FY 2025 Benchmark: Delivered 196,919 EVs in FY 2025 (+102% YoY), hitting its corporate target of doubling 2024 volume.

Top-Selling EV Models (Q1 2026)

Limo Green: 12,693 units
VF 3 (Mini-SUV): 11,088 units
VF 5 (Compact SUV): 8,490 units

3. Market Position & Global Expansion

Vietnam (Domestic Market): Holds market leadership in Vietnam across EV passenger cars and commercial taxi fleet conversions.
India: Advanced rapidly to become the 4th largest EV brand in India as of early 2026.
Southeast Asia: Scaling footprint across Indonesia, Thailand, and the Philippines.
Global Retail Footprint: Expanded total showroom and service center network to 447 showrooms globally by the end of Q1 2026.
GSM Fleet Deal: Under a massive supply agreement with GSM (Green & Smart Mobility, 95% owned by Vingroup Chairman Pham Nhat Vuong), VinFast is set to supply up to 1 million electric cars and 4 million electric scooters between 2026 and 2030.

4. Strategic & Manufacturing Updates

> [!IMPORTANT]

> Subang Plant (Indonesia) Active:

> Officially inaugurated in December 2025 with an initial ~$200M investment and 50,000-unit annual capacity. Produces Right-Hand Drive (RHD) models (VF 3, VF 5, VF 6, VF 7) for local and regional ASEAN markets.

> [!WARNING]

> Chatham County, North Carolina (US) Plant Rescheduled:

> Construction plans resumed in March 2026 after prior delays. The target operational timeline has been pushed to 2028 (from the original 2024 plan). Hiring scope was adjusted to ~1,400 workers (~80% reduction from original 7,500 headcount targets).

Shift to Asset-Light Strategy: VinFast is accelerating its pivot toward an asset-light dealership/franchise model to improve capital efficiency, cut fixed overhead, and speed up global distribution.

5. Guidance & 2026 Strategic Outlook

Delivery Target: Reiterated global EV delivery target of at least 300,000 units for full-year 2026.
Capital Discipline & Break-even Focus: Management focus is on improving gross margins through scale, supply chain optimization, and expanding high-margin model deliveries while controlling capex.

11 Tháng 8, 2026

Danh mục: Business

Hệ sinh thái phần mềm ô tô VinFast: Báo cáo nghiên cứu

2. Global Software Supplier & Tier-1 Ecosystem Matrix

3. VinAI Research Commercialization in VinFast Vehicles

A. InteriorSense (In-Cabin AI Suite)

B. SurroundSense (Surrounding & Parking AI Suite)

4. VinFast Software Architecture (SDV, OTA & Cybersecurity)

A. Centralized & Zonal Hardware/Software Platform

B. Over-The-Air (OTA) Infrastructure

C. Cybersecurity Framework

5. Software Talent Acquisition & Organizational Restructuring

A. Internal Vingroup Consolidations & Talent Transfers

B. R&D Center Footprint

C. Executive & Engineering Talent Acquisition

6. Key Takeaways & Strategic Summary

VinFast, FPT & VinAI: Nghiên cứu sâu hệ sinh thái AI ô tô

Topic 1: FPT Automotive MaaZ Stack & VinFast Integration

1.1 Stack Overview & Core Components

1.2 Development Toolchain: MaaZ Studio

1.3 Specific Contributions to VinFast & Target ECUs

1.4 Detailed AUTOSAR Layer Breakdown

Classic AUTOSAR Stack

Adaptive AUTOSAR Services (ARA)

Topic 2: VinAI Model Deployment on Snapdragon (SA8155P/SA8295P) & NXP S32G

2.1 VinAI Smart Mobility Product Suite

2.2 Model Optimization & Quantization Techniques

Quantization Strategy

2.3 Hardware Acceleration & NPU/DSP Mapping

1. Qualcomm Snapdragon Cockpit Platforms (SA8155P / SA8295P)

2. NXP S32G Platform

3. NVIDIA Drive Platforms (Comparison)

2.4 End-to-End Inference Pipeline

2.5 Mixed-Criticality Integration: QNX Hypervisor & Android Automotive OS (AAOS)

Topic 3: VinFast Zonal Controller Architecture Specifics

3.1 Architectural Evolution

3.2 Zone Topology & ECU Consolidation

Consolidated ECUs per Zone:

3.3 Compute Platforms & In-Vehicle Network Topology

Compute Hardware Allocation

Network Protocol Breakdown

3.4 AUTOSAR Classic vs. Adaptive Split

3.5 Gateway & System Functions

Technical Summary & Source References

Public Presentations, Whitepapers & Case Studies

Đầu tư bán dẫn toàn cầu 2026: Báo cáo YTD

1. Global Investment Figures (YTD 2026)

1.1 Venture Capital (VC) & Private Equity (PE)

1.2 Mergers & Acquisitions (M&A)

1.3 Government Capital & Subsidies

2. Regional Investment Breakdown

2.1 Taiwan

2.2 South Korea

2.3 United States

2.4 China

2.5 Japan

2.6 Europe (European Union)

2.7 Southeast Asia

3. Key Segment Analysis

3.1 Artificial Intelligence Chips & Accelerators

3.2 Memory (HBM, DRAM, NAND)

3.3 Foundry & Advanced Packaging

3.4 Equipment & Materials

3.5 Automotive & Power Electronics (SiC / GaN)

4. Major Deals and Funding Rounds (YTD 2026)

4.1 Top Mergers & Acquisitions (M&A)

4.2 Top Venture Capital & Private Equity Rounds

5. Government Policy & Regulatory Impact

6. Market Trends & Outlook for Remainder of 2026

Primary References & Data Sources

FDI toàn cầu ngành điện tử & bán dẫn 2026: Xu hướng Greenfield

2. FDI Flow Statistics by Destination Country (2026 YTD)

Destination Country Summary:

3. Application Breakdown & End-Market Target Dynamics

4. Country of Origin of Investors (Outbound FDI Analysis)

5. Incentive Packages & Subsidy Frameworks (2026 Matrix)

6. Major Joint Ventures (JVs) & Cross-Border Partnerships (2026 YTD)

7. Strategic Outlook & Key Takeaways for 2026-2028

Đầu tư điện tử & bán dẫn Việt Nam 2026: Báo cáo toàn cảnh

1. Major Project & Factory Announcements (2026 YTD & Recent Pipeline)

2. Comprehensive Policy Framework & Investment Incentives