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VinFast, FPT & VinAI: Nghiên cứu sâu hệ sinh thái AI ô tô

Topic 1: FPT Automotive MaaZ Stack & VinFast Integration

1.1 Stack Overview & Core Components

MaaZ (Monozukuri AUTOSAR) is FPT Automotive's proprietary, turnkey software stack designed to support full AUTOSAR compliance across the vehicle E/E development lifecycle. The stack is split into four distinct tiers:

  • MaaZ Classic Platform: Full Classic AUTOSAR stack for deeply embedded, safety-critical 32-bit Microcontroller Units (MCUs). Provides hardware-independent abstractions for real-time control.
  • MaaZ Adaptive Platform: High-performance software platform compliant with AUTOSAR Adaptive (ARA) for central domain controllers, High-Performance Compute (HPC) units, and automated driving servers running POSIX OSs (Linux/QNX).
  • MaaZ-Lite: Streamlined, memory-optimized Classic AUTOSAR stack specifically tailored for resource-constrained 16-bit and smaller 32-bit MCUs.
  • MaaZ PRO: Enhanced platform integrating AI-driven model creation, automated configuration, and test generation.
+-----------------------------------------------------------------------------------+
|                                 APPLICATION LAYER                                 |
|         Software Components (SWCs) / Adaptive Applications (ara::com / SWC)        |
+-----------------------------------------------------------------------------------+
|                         RTE / ARA (Runtime Environment)                           |
+--------------------------------------------------+--------------------------------+
|              CLASSIC AUTOSAR (BSW)               |        ADAPTIVE AUTOSAR        |
|  +--------------------+-----------------------+  |  +--------------------------+  |
|  |  Services (System, | Communication Stack   |  |  | ara::exec (Execution)    |  |
|  |  Memory, Diag)     | (CanIf, EthIf, SoAd)  |  |  | ara::com  (Communication)|  |
|  +--------------------+-----------------------+  |  | ara::diag (Diagnostics)  |  |
|  | MCAL (Microcontroller Abstraction)         |  |  | ara::per  (Persistency)  |  |
+--------------------------------------------------+--------------------------------+
|                 HARDWARE PLATFORM (AURIX TC3xx/TC4xx, S32K3, S32G)                |
+-----------------------------------------------------------------------------------+

1.2 Development Toolchain: MaaZ Studio

  • MaaZ Studio: An Eclipse-based Integrated Development Environment (IDE) and configuration generator supporting:
  • System & ECU configuration via standard ARXML schemas (AUTOSAR 4.x / Adaptive releases).
  • Automated BSW stack generation, validation, and build scripting.
  • ISO 26262 ASIL-D compliance support with qualified code generation.
  • Automotive SPICE (ASPICE) Level 2/3 software development workflow alignment.

1.3 Specific Contributions to VinFast & Target ECUs

FPT Automotive acts as a strategic software engineering partner for VinFast. Key contributions include:

  1. Vehicle Control Unit (VCU): Developing Classic AUTOSAR BSW, MCAL, and RTE for EV torque management, regenerative braking, thermal routing, and charging state machines.
  2. Body Control Module (BCM): Delivering MaaZ Classic/MaaZ-Lite stacks for central body control, lighting management, keyless entry, and door/window actuator orchestration.
  3. Battery Management System (BMS): Implementing real-time AUTOSAR memory stack (NVM/Fee/Ea) for battery state-of-health (SOH) and state-of-charge (SOC) logging with high functional safety (ASIL-D).
  4. Zonal Control Units (ZCUs): Integrating MaaZ Classic BSW for localized sensor reading, e-Fuse control, and CAN-FD to Ethernet bridging in VinFast's latest zonal platform.

    5. 1.4 Detailed AUTOSAR Layer Breakdown

    Classic AUTOSAR Stack

    • BSW (Basic Software):
    • Communication Stack: `CanIf`, `CanTp`, `Com`, `PduR`, `EthIf`, `EthSM`, `TcpIp`, `SoAd` (Socket Adaptor for Ethernet), `LinIf`. Enables deterministic CAN-FD and SOME/IP messaging.
    • Memory Stack: `NvM` (Non-Volatile Memory Manager), `Fee` (Flash EEPROM Emulation), `Ea`, `MemIf`. Handles persistent diagnostic trouble codes (DTCs) and calibration parameter storage.
    • Diagnostic Stack: `DCM` (Diagnostic Communication Manager for ISO 14229 UDS), `DEM` (Diagnostic Event Manager), `FIM` (Function Inhibition Manager).
    • System Services: `EcuM` (ECU State Manager), `BswM` (BSW Mode Manager), `Det` (Development Error Tracer), `WdgM` (Watchdog Manager).
    • MCAL (Microcontroller Abstraction Layer):
    • Customized for silicon platforms used by VinFast (NXP S32K3/S32G, Infineon AURIX TC3xx, Renesas RH850).
    • Drivers: `Dio`, `Port`, `Adc`, `Pwm`, `Spi`, `Mcu`, `Wdg`, `Can`, `Eth`.
    • RTE (Runtime Environment):
    • Auto-generated by MaaZ Studio to map Software Components (SWCs) to hardware tasks.
    • Provides standardized APIs (`Rte_Read_<p>_<d>`, `Rte_Write_<p>_<d>`, `Rte_Call_<p>_<o>`) isolating application code from underlying hardware.

    Adaptive AUTOSAR Services (ARA)

    For domain computers and zonal central compute units:

    • `ara::com`: Service-oriented communication over Ethernet (SOME/IP and local IPC shared memory backend).
    • `ara::exec`: Execution Management managing application lifecycle via POSIX process scheduling and cgroups.
    • `ara::diag`: Diagnostic management over UDS / DoIP (Diagnostics over IP – ISO 13400).
    • `ara::per`: Persistency management for key-value stores and file storage.
    • `ara::sm`: State Management for vehicle operational modes.
    • `ara::iam`: Identity and Access Management protecting IPC/SOA calls against unauthorized software components.

    Topic 2: VinAI Model Deployment on Snapdragon (SA8155P/SA8295P) & NXP S32G

    2.1 VinAI Smart Mobility Product Suite

    VinAI (a Vingroup company) develops advanced deep learning models for vehicle cabin and exterior perception:

    1. InteriorSense:
    2. Driver Monitoring System (DMS): Drowsiness, distraction, phone usage, smoking detection.
    3. Occupant Monitoring System (OMS): Child Left Behind (CPD), seatbelt detection, passenger posture.
    4. DrunkSense: AI-based intoxication detection analyzing micro-facial behaviors and eye movement patterns.
    5. MirrorSense: World’s first AI automatic mirror adjustment technology (CES 2024 Innovation Award Honoree). Predicts 3D eye gaze and head posture to automatically adjust side-view mirrors with ~10mm precision.
    6. SurroundSense:
    7. Advanced Surround View Monitoring (ASVM): High-resolution 360-degree 3D bird's-eye view.
    8. Jelly View / Transparent Bonnet: Real-time 3D synthesis rendering the ground underneath the chassis.
    9. Touch2Park: Automatic parking spot selection and trajectory planning interface.

      10. 2.2 Model Optimization & Quantization Techniques

      To achieve real-time latency (< 30ms per frame) on embedded automotive System-on-Chips (SoCs), VinAI applies rigorous quantization and hardware-specific model optimization workflows.

      +-----------------------------------------------------------------------------------+
      |                               MODEL TRAINING (PyTorch)                            |
      |             FP32 Deep Learning Models (ResNet, MobileNet, YOLO-based)            |
      +-----------------------------------------------------------------------------------+
                                                |
                                                v
      +-----------------------------------------------------------------------------------+
      |                            QUANTIZATION & OPTIMIZATION                            |
      |  - Quantization-Aware Training (QAT) / Post-Training Quantization (PTQ)           |
      |  - FP32 -> INT8 (Per-channel weight & per-tensor activation scaling)               |
      |  - Operator Fusion (Conv + BatchNorm + ReLU)                                      |
      +-----------------------------------------------------------------------------------+
                                                |
                                                v
      +-----------------------------------------------------------------------------------+
      |                              SDK HARDWARE COMPILATION                             |
      |  +-------------------------------------+---------------------------------------+  |
      |  | Qualcomm QNN / SNPE SDK             | NXP eIQ ML Software / ONNX Runtime    |  |
      |  | (Compiles to Hexagon DLC Bytecode)  | (Targeting Arm Cortex-A / NXP S32G)   |  |
      |  +-------------------------------------+---------------------------------------+  |
      +-----------------------------------------------------------------------------------+
                                                |
                                                v
      +-----------------------------------------------------------------------------------+
      |                               TARGET HARDWARE EXECUTION                           |
      |  +-------------------------------------+---------------------------------------+  |
      |  | Qualcomm SA8155P / SA8295P          | NXP S32G2 / S32G3                     |  |
      |  | Hexagon Tensor Processor (HTP/HVX)  | Cortex-A53 / Cortex-A72 cores         |  |
      |  +-------------------------------------+---------------------------------------+  |
      +-----------------------------------------------------------------------------------+

      Quantization Strategy

      • Precision Conversion: Full Precision (FP32) $\rightarrow$ Signed INT8 for weights and activations.
      • Quantization Schemes:
      • Post-Training Quantization (PTQ): Used for heavy backbone layers where precision loss is negligible. Uses symmetric quantization for weights and asymmetric quantization for activations with KL-divergence calibration.
      • Quantization-Aware Training (QAT): Applied to fine-grained feature heads (e.g., MirrorSense 3D gaze vector calculation and facial keypoint detection) to maintain precision within a tight 10mm error boundary.
      • Per-Channel Weight Quantization: Prevents clipping errors caused by wide dynamic weight ranges across convolutional channels.

      2.3 Hardware Acceleration & NPU/DSP Mapping

      1. Qualcomm Snapdragon Cockpit Platforms (SA8155P / SA8295P)

      • Hardware Architecture:
      • SA8155P (3rd Gen): Kryo 485 CPU, Adreno 640 GPU, Hexagon 690 DSP (incorporating HVX – Hexagon Vector Extensions).
      • SA8295P (4th Gen): Kryo 685 CPU, Adreno 695 GPU, Hexagon Tensor Processor (HTP) delivering up to 30+ TOPS of NPU inference capability.
      • SDK Deployment:
      • SNPE (Snapdragon Neural Processing Engine) & QNN SDK (Qualcomm Neural Network / AI Stack).
      • Models are converted from ONNX/PyTorch into target Deep Learning Containers (`.dlc` files) or QNN binary graphs (`.so`).
      • Convolution, depthwise-separable conv, and matrix multiplication layers are mapped to run natively on the Hexagon HTP / HVX.
      • Non-supported activation functions or custom post-processing layers fall back to GPU (OpenCL) or CPU (NEON).

      2. NXP S32G Platform

      • Hardware Architecture: NXP S32G274A / S32G399A network processors feature Quad/Octa Arm Cortex-A53 / Cortex-A72 cores with ASIL D Cortex-M7 real-time cores.
      • Deployment Workflow:
      • Deployed via NXP eIQ Machine Learning Software Development Environment.
      • Utilizes optimized C++ ONNX Runtime or TensorFlow Lite C++ runtimes using Arm NEON vector SIMD instructions on Cortex-A cores.
      • For tasks requiring deep neural network acceleration, inference processing is offloaded via Ethernet/PCIe to Qualcomm Snapdragon SoCs or dedicated edge NPUs.

      3. NVIDIA Drive Platforms (Comparison)

      • Where NVIDIA Drive Orin is deployed for exterior ADAS/AD, models are optimized via TensorRT, utilizing INT8 Tensor Cores with explicit precision calibration and layer fusion.

      2.4 End-to-End Inference Pipeline

      A continuous pipeline processes multi-camera inputs with minimum latency:

      [ Camera (MIPI-CSI2) ]
             │
             ▼
      [ Qualcomm ISP Driver ] ───(Zero-copy YUV420)───► [ FastCV / DSP Preprocessing ]
                                                                    │ (Resizing/Norm)
                                                                    ▼
      [ Renderer / Display / CAN ] ◄─── [ QNN Engine / HTP NPU ] ◄─── [ Tensor Input Buffer ]
        (Gaze Vector / 3D SVM Mesh)      (INT8 Neural Model)
      1. Camera Ingestion: NIR (Near-Infrared) camera for DMS/MirrorSense or 4x RGB Fisheye cameras for SurroundSense feed into the SoC via MIPI CSI-2 interface.
      2. ISP Hardware Pipeline: Image Signal Processor (ISP) executes auto-exposure, de-warping, and noise reduction outputting YUV420/NV12 frame buffers into shared memory.
      3. Hardware-Accelerated Preprocessing: Using Qualcomm FastCV library on Hexagon DSP:
      4. Color space conversion (YUV420 $\rightarrow$ RGB / Grayscale).
      5. Image resizing, letterboxing, and normalization ($x_{\text{norm}} = (x – \mu) / \sigma$).
      6. NPU Execution: Zero-copy execution via QNN SDK memory descriptors (`Qnn_Tensor_t`). Data is processed directly on the Hexagon Tensor Processor (HTP).
      7. Post-Processing & Output:
      8. DMS/OMS: Face mesh detection, gaze direction calculation, eye-blink rate estimation.
      9. MirrorSense: Computes driver's 3D eye position vector relative to side-view mirror coordinates; dispatches adjustment commands over CAN-FD to side mirror motors.
      10. SurroundSense: De-warps 4 camera feeds and stitches them onto a dynamic 3D bowl mesh for 360-degree ASVM and Transparent Chassis rendering via OpenGL ES / Vulkan.

        11. 2.5 Mixed-Criticality Integration: QNX Hypervisor & Android Automotive OS (AAOS)

        To ensure functional safety while maintaining high infotainment usability, VinFast cockpit systems leverage hypervisor virtualization:

        +-----------------------------------------------------------------------------------+
        |                                QUALCOMM SA8155P / SA8295P                         |
        +-----------------------------------------------------------------------------------+
        |                                 QNX HYPERVISOR v2.x                               |
        +-----------------------------------------+-----------------------------------------+
        |        QNX Safety RTOS (ASIL-B/D)       |      Android Automotive OS (AAOS)       |
        |  - Instrument Cluster / Head-Up Display |  - In-Vehicle Infotainment (IVI) App    |
        |  - VinAI InteriorSense/MirrorSense Daemon|  - SurroundSense 360 UI / Touch2Park   |
        |  - Fast-boot Rearview Camera (RVC)      |  - Media, Navigation, App Store         |
        +-----------------------------------------+-----------------------------------------+
        |                  Shared Memory IPC / Gralloc Buffer Management                    |
        +-----------------------------------------------------------------------------------+
        • QNX Hypervisor: Runs directly on bare-metal silicon, creating isolated virtual machine partitions.
        • QNX Safety RTOS Domain:
        • Hosts safety-critical applications (digital cluster, telltales, fast-boot camera service).
        • Runs the primary VinAI DMS/MirrorSense inference daemon. If Android crashes or reboots, driver monitoring remains active and operational within ASIL constraints.
        • Android Automotive OS (AAOS) Domain:
        • Hosts rich IVI user interfaces, 3D SurroundSense rendering apps, navigation, and infotainment.
        • Zero-Copy Video/Buffer Sharing:
        • Uses QNX shared memory (`shm_open`) and Android `Gralloc` / `ION` memory allocators.
        • Camera frames captured by QNX ISP drivers are accessed by VinAI inference runtimes and AAOS render engines without duplicating frame buffers in memory.

        Topic 3: VinFast Zonal Controller Architecture Specifics

        3.1 Architectural Evolution

        VinFast has transitioned its vehicle platform architecture through three distinct stages:

        [ Phase 1: Distributed E/E ] ──► [ Phase 2: Domain-Based E/E ] ──► [ Phase 3: Zonal E/E Architecture ]
        (VF e34 - 30+ Discrete ECUs)     (VF 8 / VF 9 - Domain HPCs)       (Limo Green, VF MPV 7, Next VF6/7)
        1. Distributed E/E Architecture (Early Generation – VF e34):
        2. Over 30+ independent ECUs connected via traditional CAN/LIN buses. High wiring harness weight and complex cable routing.
        3. Domain-Based Architecture (VF 8 / VF 9):
        4. ECUs grouped into functional domains: Infotainment Domain (Cockpit HPC), ADAS Domain (Autonomous Driving HPC), Powertrain Domain, Body Domain.
        5. Zonal E/E Architecture (Current Next-Gen Platform – Limo Green, VF MPV 7, Next-Gen VF 6/7/8):
        6. Divides the vehicle into physical geographical zones. Local sensors and actuators connect to nearby Zonal Control Units (ZCUs), which bridge data via high-speed Ethernet to a central High-Performance Compute (HPC) cluster.

          7. 3.2 Zone Topology & ECU Consolidation

          VinFast's Zonal Architecture incorporates 4 Physical Zonal Control Units (ZCUs):

                                +-----------------------------------+
                                |   CENTRAL COMPUTE CLUSTER (HPC)   |
                                |  - Cockpit HPC (SA8155P/SA8295P)  |
                                |  - ADAS HPC (Qualcomm/NVIDIA)     |
                                |  - Central Gateway (NXP S32G3)    |
                                +-----------------+-----------------+
                                                  | 1000BASE-T1 Ethernet
                   +------------------------------+------------------------------+
                   |                              |                              |
                   v                              v                              v
          +------------------+          +------------------+          +------------------+
          | Front-Left Zone  |          | Front-Right Zone |          |  Rear-Left Zone  |
          | Controller (ZCU) |          | Controller (ZCU) |          | Controller (ZCU) |
          +--------+---------+          +--------+---------+          +--------+---------+
                   |                             |                             |
                   v                             v                             v
          [ Front-Left Sensors/ ]       [ Front-Right Sensors/ ]      [ Rear-Left Sensors/ ]
          [ Actuators / Lighting ]      [ Actuators / Radar    ]      [ Door/Window Motors ]

          Consolidated ECUs per Zone:

          • Front-Left ZCU:
          • Consolidates: Front-left lighting controller, wipers, left horn, washer fluid pump, front-left wheel speed sensor aggregator, left e-Fuse power distribution channel.
          • Front-Right ZCU:
          • Consolidates: Front-right lighting controller, front radar interface, thermal management valves, AC compressor control, right e-Fuse power distribution channel.
          • Rear-Left ZCU:
          • Consolidates: Left rear door control unit (window lifter, latch, mirror heating), rear-left light cluster, tailgate motor actuator, left rear e-Fuse channel.
          • Rear-Right ZCU:
          • Consolidates: Right rear door control unit, rear-right light cluster, trailer module, rear ultrasonic sensor hub, right rear e-Fuse channel.

          3.3 Compute Platforms & In-Vehicle Network Topology

          Compute Hardware Allocation

          Architecture Tier Compute Platform Processor Family Primary OS / Software Stack
          Cockpit HPC Qualcomm Snapdragon SA8155P / SA8295P 8x Kryo CPU + Hexagon NPU QNX Hypervisor + Android Automotive OS
          ADAS/AD HPC Qualcomm Snapdragon Ride / NVIDIA Orin Multi-core CPU + Tensor Cores QNX Safety RTOS / Embedded Linux
          Central Zonal Gateway NXP S32G (S32G274A / S32G399A) Quad Cortex-A53/A72 + Quad Cortex-M7 Adaptive AUTOSAR + Classic AUTOSAR
          Zonal Controllers (4x) NXP S32K3 Series / Infineon AURIX TC3xx Arm Cortex-M7 / TriCore Classic AUTOSAR (FPT MaaZ Classic)

          Network Protocol Breakdown

          • Automotive Ethernet Backbone (1000BASE-T1 / 100BASE-T1):
          • 1000BASE-T1 (1 Gbps): Links Central Gateway (NXP S32G) to Cockpit HPC, ADAS HPC, and Zonal Controllers.
          • 100BASE-T1 (100 Mbps): High-speed sensor feeds (IP cameras, forward radar) to ZCUs and HPCs.
          • Switch Architecture: NXP SJA1110 10-port Automotive Ethernet Switch with hardware Time-Sensitive Networking (TSN – IEEE 802.1Qav/Qbv) for deterministic low-latency video and control traffic.
          • Sub-Buses:
          • CAN-FD (Flexible Data-rate up to 5 Mbps): Used between ZCUs and local powertrain/chassis sensors/actuators (e.g., EPS, ESC, Brake Control, Battery Management).
          • LIN (Local Interconnect Network up to 20 kbps): Low-cost peripheral connections (window switches, climate buttons, interior ambient lights).

          3.4 AUTOSAR Classic vs. Adaptive Split

          +-----------------------------------------------------------------------------------+
          |                        CENTRAL COMPUTE CLUSTER (HPCs)                             |
          |                        AUTOSAR ADAPTIVE PLATFORM (ARA)                            |
          |  - Dynamic C++ Application Deployment                                              |
          |  - Service-Oriented Architecture (ara::com / SOME/IP)                             |
          |  - High Bandwidth Processing (Cloud, OTA, ADAS, Infotainment)                      |
          +-----------------------------------------------------------------------------------+
                                                   │
                                                   ▼ [ SOME/IP over Ethernet ]
          +-----------------------------------------------------------------------------------+
          |                         ZONAL CONTROL UNITS (ZCUs)                                |
          |                        AUTOSAR CLASSIC PLATFORM (BSW)                             |
          |  - Static C Application Architecture (FPT MaaZ Stack)                              |
          |  - Signal-Based & Real-Time Hard Determinism                                       |
          |  - I/O Control, Smart e-Fuse Power Switching, CAN-FD/LIN Gateway                  |
          +-----------------------------------------------------------------------------------+

          3.5 Gateway & System Functions

          1. Signal-to-Service (S2S) Translation:
          2. Translates legacy signal-based CAN-FD message frames (e.g., wheel speed signals, battery temperature) into Service-Oriented Architecture (SOME/IP) packets published over Ethernet for consumption by Adaptive AUTOSAR applications.
          3. Protocol Routing & PDU Router:
          4. Routes Protocol Data Units (PDUs) cross-domain between CAN-FD, LIN, and Automotive Ethernet networks with sub-millisecond switching latency.
          5. Centralized Security & Firewall:
          6. Integrated Hardware Security Module (HSM) on NXP S32G / Infineon AURIX handles Secure Boot, MACsec (802.AE) Ethernet frame encryption, and SecOC (Secure On-Board Communication) verification for CAN-FD.
          7. Includes Intrusion Detection and Prevention Systems (IDPS) filtering unauthorized packets.
          8. OTA Update Master:
          9. NXP S32G Central Gateway receives encrypted Over-The-Air (OTA) package bundles from the cloud, verifies signatures via HSM, and coordinates flashing across ZCUs and sub-ECUs via UDS-over-IP (DoIP).
          10. Smart Power Distribution (e-Fuse Management):
          11. ZCUs replace legacy mechanical relays/fuses with solid-state e-Fuses. Enables dynamic load shedding, over-current protection, and individual power channel cycling during sleep/wake states.

            12. Technical Summary & Source References

            Public Presentations, Whitepapers & Case Studies

            1. FPT Automotive & MaaZ Documentation:
            2. FPT Automotive Launch & Monozukuri AUTOSAR (MaaZ) Ecosystem Overview (2023–2024).
            3. FPT Software & VinFast Strategic Technology Partnership Announcements (2023).
            4. MaaZ Suite Product Architecture: Classic BSW, Adaptive ARA, MaaZ Studio Toolchain Specifications (`maaz.global` / `fpt.auto`).
            5. VinAI Technical Papers & CES Showcases:
            6. MirrorSense: AI-driven Automatic Side Mirror Adjustment System, CES 2024 Innovation Award Documentation (`vinai.io`).
            7. VinAI Smart Mobility Suite Integration on Qualcomm Snapdragon Digital Chassis, VinAI & Qualcomm Joint Technical Release (2023).
            8. Qualcomm SNPE / QNN Acceleration Workflows on Hexagon DSP/HTP Architecture (`qualcomm.com`).
            9. VinFast & NXP Joint Architecture Whitepapers:
            10. VinFast Zonal E/E Architecture Transition & NXP S32G Integration, NXP Semiconductors & VinFast Joint Announcement (`nxp.com`).
            11. NXP S32G Vehicle Network Processors & SJA1110 TSN Ethernet Switch Reference Architectures.

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